参数资料
型号: MCF5474VR266
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA388
封装: 27 X 27 MM, MS-034AAL-1, PBGA-388
文件页数: 4/34页
文件大小: 600K
代理商: MCF5474VR266
MCF547x ColdFire Microprocessor, Rev. 4
Reset Timing Specifications
Freescale Semiconductor
12
7
Reset Timing Specifications
Table 9 lists specifications for the reset timing parameters shown in Figure 10
Figure 10 shows reset timing for the values in Table 9.
Figure 10. Reset Timing
8FlexBus
A multi-function external bus interface called FlexBus is provided on the MCF54
72 with basic functionality to interface to
slave-only devices up to a maximum bus frequency of 66 MHz. It can be directly connected to asynchronous or synchronous
devices such as external boot ROMs, flash memories, gate-array logic, or other simple target (slave) devices with little or no
additional circuitry. For asynchronous devices, a simple chip-select based interface can be used. The FlexBus interface has six
general purpose chip-selects (FBCS[5:0]). Chip-select FBCS0 can be dedicated to boot ROM access and can be programmed
to be byte (8 bits), word (16 bits), or longword (32 bits) wide. Control signal timing is compatible with common ROM / flash
memories.
Table 9. Reset Timing Specifications
Num
Characteristic
66 MHz CLKIN
Units
Min
Max
R11
1 RSTI and FlexBus data lines are synchronized internally. Setup and hold
times must be met only if recognition on a particular clock is required.
Valid to CLKIN (setup)
8
ns
R2
CLKIN to invalid (hold)
1.0
ns
R3
RSTI to invalid (hold)
1.0
ns
RSTI pulse duration
5
CLKIN cycles
CLKIN
R1
R3
R2
R1
RSTI
Mode Select
FlexBus
NOTE:
Mode selects are registered on the rising clock edge before
the cycle in which RSTI is recognized as being negated.
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