参数资料
型号: MCIMX31DVMN5D
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 532 MHz, MICROPROCESSOR, PBGA473
封装: 19 X 19 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-473
文件页数: 60/118页
文件大小: 1083K
代理商: MCIMX31DVMN5D
MCIMX31/MCIMX31L Technical Data, Rev. 4.3
46
Freescale Semiconductor
Electrical Characteristics
NOTE
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value. SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is, Table 33 indicates SDRAM requirements. All output signals
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
SD9
Data out hold time1
tOH
1.8
ns
SD10
Active to read/write command period
tRC
10
clock
1 Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 33. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
ID
Parameter
Symbol
Min
Max
Unit
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