参数资料
型号: MCIMX357DVM5B
厂商: Freescale Semiconductor
文件页数: 87/147页
文件大小: 0K
描述: PROCESSOR MULTIMEDIA 400PBGA
标准包装: 90
系列: i.MX35
核心处理器: ARM11
芯体尺寸: 32-位
速度: 532MHz
连通性: 1 线,CAN,EBI/EMI,以太网,I²C,MMC,SPI,SSI,UART/USART,USB OTG
外围设备: DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 96
程序存储器类型: ROMless
RAM 容量: 128K x 8
电压 - 电源 (Vcc/Vdd): 1.33 V ~ 1.47 V
振荡器型: 外部
工作温度: -20°C ~ 70°C
封装/外壳: 400-LFBGA
包装: 托盘
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 10
Freescale Semiconductor
44
WE40A
(muxed
A/D)
CS[x] valid to LBA invalid
WE14 – WE6 + (LBN + LBA + 1
– CSA)
–3 + (LBN + LBA +
1 – CSA)
3 + (LBN + LBA + 1 –
CSA)
ns
WE41
CS[x] valid to Output Data valid
WE16 – WE6 – WCSA
3 – WCSA
ns
WE41A
(muxed
A/D)
CS[x] valid to Output Data valid
WE16 – WE6 + (WLBN +
WLBA + ADH + 1 – WCSA)
3 + (WLBN + WLBA +
ADH + 1 – WCSA)
ns
WE42
Output Data invalid to CS[x]
Invalid
WE17 – WE7 – CSN
3 – CSN
ns
WE43
Input Data valid to CS[x] invalid MAXCO – MAXCSO + MAXDI
MAXCO6 –
MAXCSO7 +
MAXDI8
—ns
WE44
CS[x] invalid to Input Data
invalid
00
ns
WE45
CS[x] valid to BE[y] valid (write
access)
WE12 – WE6 + (WBEA – CSA)
3 + (WBEA – CSA)
ns
WE46
BE[y] invalid to CS[x] invalid
(write access)
WE7 – WE13 + (WBEN – CSN)
–3 + (WBEN – CSN)
ns
WE47
DTACK valid to CS[x] invalid
MAXCO – MAXCSO + MAXDTI
MAXCO6
MAXCSO7 +
MAXDTI9
—ns
WE48
CS[x] Invalid to DTACK invalid
0
ns
1 For the value of parameters WE4–WE21, see column BCD = 0 in Table 33.
2 CS Assertion. This bit field determines when the CS signal is asserted during read/write cycles.
3 CS Negation. This bit field determines when the CS signal is negated during read/write cycles.
4 BE Assertion. This bit field determines when the BE signal is asserted during read cycles.
5 BE Negation. This bit field determines when the BE signal is negated during read cycles.
6 Output maximum delay from internal driving ADDR/control FFs to chip outputs.
7 Output maximum delay from CS[x] internal driving FFs to CS[x] out.
8 DATA maximum delay from chip input data to its internal FF.
9
DTACK maximum delay from chip dtack input to its internal FF.
Note:
All configuration parameters (CSA, CSN, WBEA, WBEN, LBA, LBN, OEN, OEA, RBEA, and RBEN) are in cycle units.
Table 34. WEIM Asynchronous Timing Parameters Relative Chip Select Table (continued)
Ref No.
Parameter
Determination By
Synchronous Measured
Parameters1
Min
Max
(If 133 MHz is
supported by SoC)
Unit
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