参数资料
型号: MCP1318MT-29LE/OT
厂商: Microchip Technology
文件页数: 25/52页
文件大小: 0K
描述: IC SUPERVISOR 2.9V OD/PP SOT23-5
标准包装: 3,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极,推挽式
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.9V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 带卷 (TR)
MCP131X/2X
3.1
Ground Terminal (V SS )
3.4
Manual Reset Input (MR)
V SS provides the negative reference for the analog
input voltage. Typically, the circuit ground is used.
The Manual Reset (MR) input pin allows a push button
switch to easily be connected to the system. When the
push button is depressed, it forces a system Reset.
3.2
Supply Voltage (V DD )
This pin has circuitry that filters noise that may be
present on the MR signal.
V DD can be used for power supply monitoring or a
voltage level that requires monitoring.
The MR pin is active-low and has an internal pull-up
resistor.
3.3
Reset Output (RST and RST)
3.5
Watchdog Input
There are four types of Reset output pins. These are:
In some systems, it is desirable to have an external
1.
2.
3.
4.
Open-Drain active-low Reset, External pull-up
resistor required
Open-Drain active-low Reset, Internal pull-up
resistor
Push-Pull active-low Reset
Push-Pull active-high Reset
Watchdog Timer to monitor the operation of the
system. This is done by requiring the embedded
controller to “pet” the Watchdog Timer within a
predetermined time frame (T WD ). If the MCP131X/2X is
not “petted” within this time frame, the MCP131X/2X
will force the Reset pin(s) active.
Some devices have both an active-low and active-high
Reset output.
The embedded controller “pets” the MCP131X/2X by
forcing an edge transition on the WDI pin. The WDT
Timer is activated by the first falling edge on the WDI
3.3.1
ACTIVE-LOW (RST) - OPEN-DRAIN,
pin.
EXTERNAL PULL-UP RESISTOR
The RST open-drain output remains low while V DD is
below the Reset voltage threshold (V TRIP ). Once the
device voltage (V DD ) returns to a high level
(V TRIP + V HYS ), the device will remain in Reset for the
Reset delay timer (T RST ). After that time expires, the
RST pin will float, and an external pull-up resistor is
required to bring the output to the high state.
The standard offering devices have a typical Watchdog
Timer period (T WD ) of 1.6 s. Table 1-3 shows the
available Watchdog Timer periods.
3.3.2
ACTIVE-LOW (RST) - OPEN-DRAIN,
INTERNAL PULL-UP RESISTOR
The RST open-drain output remains low while V DD is
below the Reset voltage threshold (V TRIP ). Once the
device voltage (V DD ) returns to a high level
(V TRIP + V HYS ), the device will remain in Reset for the
Reset delay timer (T RST ). After that time expires, the
RST pin will be pulled high by an internal pull-up
resistor (typically 4.7 k Ω ).
3.3.3
ACTIVE-LOW (RST) - PUSH-PULL
The RST push-pull output remains low while V DD is
below the Reset voltage threshold (V TRIP ). Once the
device voltage (V DD ) returns to a high level
(V TRIP + V HYS ), the device will remain in Reset for the
Reset delay timer (T RST ). After that time expires, the
RST pin will be driven to the high state.
3.3.4
ACTIVE-HIGH (RST) - PUSH-PULL
The RST push-pull output remains high while V DD is
below the Reset voltage threshold (V TRIP ). Once the
device voltage (V DD ) returns to a high level
(V TRIP + V HYS ), the device will remain in Reset for the
Reset delay timer (T RST ). After that time expires, the
RST pin will be driven to the low state.
? 2005-2012 Microchip Technology Inc.
DS21985C-page 25
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