参数资料
型号: MCP14628T-E/MF
厂商: Microchip Technology
文件页数: 1/24页
文件大小: 0K
描述: IC MOSFET DVR 2A SYNC BUCK 8-DFN
标准包装: 3,300
配置: 高端和低端,同步
输入类型: PWM
延迟时间: 18ns
电流 - 峰: 2A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 36V
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-VDFN 裸露焊盘
供应商设备封装: 8-DFN-EP(3x3)
包装: 带卷 (TR)
MCP14628
2A Synchronous Buck Power MOSFET Driver
Features
? Dual Output MOSFET Driver for Synchronous
Applications
? High Peak Output Current: 2A (typical)
? Adaptive Cross Conduction Protection
? Internal Bootstrap Blocking Device
? +36V BOOT Pin Maximum Rating
? Enhanced Light Load Efficiency Mode
? Low Supply Current: 80 μA (typical)
? High Capacitive Load Drive Capability:
- 3300 pF in 10 ns (typical)
? Tri-State PWM Pin for Power Stage Shutdown
? Input Voltage Undervoltage Lockout Protection
? Space Saving Packages:
- 8-Lead SOIC
- 8-Lead 3x3 DFN
Applications
? High Efficient Synchronous DC/DC Buck
Converters
? High Current Low Output Voltage Synchronous
DC/DC Buck Converters
? High Input Voltage Synchronous DC/DC Buck
Converters
? Core Voltage Supplies for Microprocessors
General Description
The MCP14628 is a dual MOSFET gate driver
designed to optimally drive two N-Channel MOSFETs
arranged in a non-isolated synchronous buck converter
topology. With the capability to source 2A peaks
typically from both the high-side and low-side drives,
the MCP14628 is an ideal companion to buck control-
lers that lack integrated gate drivers. Additionally,
greater design flexibility is offered by allowing the gate
drivers to be placed close to the power MOSFETs.
The MCP14628 features the capability to sink 3.5A
peak typically for the low-side gate drive. This allows
the MCP14628 the capability of holding off the low-side
power MOSFET during the rising edge of the PHASE
node. Internal adaptive cross conduction protection
circuitry is also used to mitigate both external power
MOSFETs from simultaneously conducting.
The low resistance pull-up and pull-down drives allow
the MCP14628 to quickly transition a 3300 pF load in
typically 10 ns and with a propagation time of typically
20 ns. Bootstrapping for the high-side drive is internally
implemented which allows for a reduced system cost
and design complexity.
The PWM input to the MCP14628 can be tri-stated to
force both drive outputs low for true power stage
shutdown. Light load system efficiency is improved by
using the diode emulation feature of the MCP14628.
When the FCCM pin is grounded, diode emulation
mode is entered. In this mode, discontinuous conduc-
tion is allowed by sensing when the inductor current
reach zero and turning off the low-side power
MOSFET.
Package Types
8-Lead SOIC
8-Lead DFN
HIGHDR
BOOT
PWM
GND
1
2
3
4
8
7
6
5
PHASE
FCCM
V CC
LOWDR
HIGHDR
BOOT
PWM
GND
1
2
3
4
8
7
6
5
PHASE
FCCM
V CC
LOWDR
Note 1: Exposed pad on the DFN is electrically isolated.
? 2008 Microchip Technology Inc.
DS22083A-page 1
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