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| 型号： | MCP1612-ADJI/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 5/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1A 8DFN |
| 标准包装： | 120 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.4MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 8-DFN-EP（3x3） |
MCP1612
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, V IN = V CC = V SHDN = 3.3V, V OUT = 1.8V, C IN = C OUT = 10 μF, L = 3.3 μH,
I LOAD = 100 mA, T A = +25°C. Boldface specifications apply over the T A range of -40°C to +85°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Protection Features
Undervoltage Lockout
Undervoltage Lockout Hysteresis
Thermal Shutdown
Thermal Shutdown Hysteresis
UVLO
UVLO- HYS
T SHD
T SHD-HYS
2.4
—
—
—
2.55
200
160
9
2.7
—
—
—
V
mV
°C
°C
Interface Signal (SHDN)
Logic-High Input
Logic-Low Input
V IN-HIGH
V IN-LOW
45
—
—
—
—
15
% of V IN
% of V IN
Note 1:
2:
The integrated MOSFET switches have an integral diode from the L X pin to V IN and from L X to P GND . In cases where
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to regulate the junction temperature for these cases.
UVLO is specified for a falling V IN . Once the UVLO is activated, the UVLO- HYS must be overcome before the device will
return to operation.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: V IN = 3.0V to 5.5V, F OSC = 1 MHz with 10% Duty Cycle, C IN = 0.1 μF. T A = -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Storage Temperature Range
Maximum Junction Temperature
Operating Junction Temperature Range
T A
T J
T A
-65
—
- 40
—
—
—
+150
+150
+ 125
°C
°C
°C
Continuous
Transient Only
Continuous Operation
Thermal Package Resistances
Thermal Resistance, 8L-MSOP
θ JA
—
208
—
°C/W
Typical 4-layer board interconnecting
vias
Thermal Resistance, 8L-DFN
θ JA
—
41
—
°C/W
Typical 4-layer board interconnecting
vias
? 2005 Microchip Technology Inc.
DS21921B-page 5
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