参数资料
型号: MCP1725T-2502E/SN
厂商: Microchip Technology
文件页数: 20/32页
文件大小: 0K
描述: IC REG LDO 2.5V .5A 8SOIC
产品培训模块: High Current LDOs
标准包装: 3,300
稳压器拓扑结构: 正,固定式
输出电压: 2.5V
输入电压: 最高 6V
电压 - 压降(标准): 0.21V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA(最小)
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
其它名称: MCP1725T-2502E/SNTR
MCP1725
5.0
5.1
APPLICATION CIRCUITS/
ISSUES
Typical Application
In addition to the LDO pass element power dissipation,
there is power dissipation within the MCP1725 as a
result of quiescent or ground current. The power
dissipation as a result of the ground current can be
calculated using the following equation:
The MCP1725 is used for applications that require high
LDO output current and a power good output.
MCP1725-2.5
EQUATION 5-2:
P I ( GND ) = V IN ( MAX ) × I VIN
Where:
V IN = 3.3V
C 1
10 μF
On
O ff
1 V IN V OUT 8
2 V IN Sense 7
3 SHDN C DELAY 6
4 GND PWRGD 5
V OUT = 2.5V @ 0.5A
R 1
10k Ω C 2
10 μF
C 3
1000 pF
P I(GND
V IN(MAX)
I VIN
=
=
=
Power dissipation due to the
quiescent current of the LDO
Maximum input voltage
Current flowing in the V IN pin
with no LDO output current
(LDO quiescent current)
The total power dissipated within the MCP1725 is the
sum of the power dissipated in the LDO pass device
PWRGD
and the P(I GND ) term. Because of the CMOS
construction, the typical I GND for the MCP1725 is
FIGURE 5-1:
Typical Application Circuit.
120 μA. Operating at 3.465V results in a power dissipa-
tion of 0.42 milli-Watts. For most applications, this is
5.1.1
APPLICATION CONDITIONS
small compared to the LDO pass device power
dissipation and can be neglected.
Package Type
Input Voltage Range
V IN maximum
V IN minimum
V DROPOUT (max)
V OUT (typical)
I OUT
P DISS (typical)
Temperature Rise
=
=
=
=
=
=
=
=
=
2x3 DFN8
3.3V ± 5%
3.465V
3.135V
0.350V
2.5V
0.5A maximum
0.4W
30.4 ° C
The maximum continuous operating junction
temperature specified for the MCP1725 is +125 ° C . To
estimate the internal junction temperature of the
MCP1725, the total internal power dissipation is
multiplied by the thermal resistance from junction to
ambient (R θ JA ) of the device. The thermal resistance
from junction to ambient for the 2x3 DFN package is
estimated at 76 ° C/W.
EQUATION 5-3:
T J ( MAX ) = P TOTAL × R θ JA + T AMAX
5.2
5.2.1
Power Calculations
POWER DISSIPATION
T J(MAX) = Maximum continuous junction
temperature
The internal power dissipation within the MCP1725 is a
function of input voltage, output voltage, output current,
and quiescent current. Equation 5-1 can be used to
calculate the internal power dissipation for the LDO.
EQUATION 5-1:
P LDO = ( V IN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) )
Where:
P TOTAL = Total device power dissipation
R θ JA = Thermal resistance from junction to
ambient
T AMAX = Maximum ambient temperature
P LDO
V IN(MAX)
V OUT(MIN)
=
=
=
LDO Pass device internal
power dissipation
Maximum input voltage
LDO minimum output voltage
DS22026B-page 20
? 2007 Microchip Technology Inc.
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