参数资料
型号: MCP2021P-330E/MD
厂商: Microchip Technology
文件页数: 4/52页
文件大小: 0K
描述: IC TXRX LIN ON-BOARD VREG 8DFN
产品培训模块: Microchip MCP20xx LIN Transceiver Overview
标准包装: 91
系列: *
MCP2021/2/1P/2P
DS22018F-page 12
2005-2012 Microchip Technology Inc.
1.4
Pin Descriptions
TABLE 1-1:
PINOUT DESCRIPTIONS
1.4.1
POWER OUTPUT (VREG)
Positive Supply Voltage Regulator Output pin.
1.4.2
GROUND (VSS)
Ground pin.
1.4.3
BATTERY (VBB)
Battery Positive Supply Voltage pin. This pin is also the
input for the internal voltage regulator.
1.4.4
TRANSMIT DATA INPUT (TXD)
The Transmit Data Input pin has an internal pull-up to
VREG. The LIN pin is low (dominant) when TXD is low,
and high (recessive) when TXD is high.
For extra bus security, TXD is internally forced to ‘1’
when VREG is less than 1.8V (typ.).
If the thermal protection detects an over-temperature
condition while the signal TXD is low, the transmitter is
shut down. The recovery from the thermal shutdown is
equal to adequate cooling time.
1.4.5
RECEIVE DATA OUTPUT (RXD)
The Receive Data Output pin is a standard CMOS
output and follows the state of the LIN pin.
1.4.6
LIN BUS
The bidirectional LIN bus Interface pin is the driver unit
for the LIN pin and is controlled by the signal TXD. LIN
has an open collector output with a current limitation.
To reduce EMI, the edges during the signal changes
are slope-controlled. To further reduce radiated emis-
sions, the LBUS pin has corner-rounding control for both
falling and rising edges.
The internal LIN receiver observes the activities on the
LIN bus, and generates output signal RXD that follows
the state of the LBUS. A 1st degree with 1 S time con-
stant (160KhZ), low-pass input filter is placed to
maintain EMI immunity.
1.4.7
CS/LWAKE
Chip Select Input pin. A internal pull-down resistor will
keep the CS/LWAKE pin low. This is done to ensure
that no disruptive data will be present on the bus while
the microcontroller is executing a POR and I/O initial-
ization sequence. The pin must see a high level to
activate the transmitter.
If CS/LWAKE= ‘0’ when the VBB supply is turned on,
the device stays in Ready mode (Low-Power mode). In
Ready mode, both the receiver and the voltage
regulator are on and the LIN transmitter driver is off.
If CS/LWAKE = ‘1’ when the VBB supply is turned on,
the device will proceed to either Operation or Transmit-
ter-Off mode (refer to Figure 1-2 and Figure 1-3) after
the VREG output has stabilized.
This pin may also be used as a local wake-up input
(see Figure 1-6). In this implementation, the microcon-
troller will set the I/O pin that controls the CS/LWAKE
as an high-impedance input. The internal pull-down
resistor will keep the input low. An external switch, or
other source, can then wake up the transceiver and the
microcontroller.
Pin
Name
Devices
Pin
Type
Function
8-Pin
DFN,
PDIP,
SOIC
14-Pin
PDIP,
SOIC,
TSSOP
Normal Operation
VREG
3
O
Power Output
VSS
5
11
P
Ground
VBB
7
13
P
Battery Supply
TXD
4
I
Transmit Data Input (TTL)
RXD
1
O
Receive Data Output (CMOS)
LBUS
6
12
I/O
LIN bus (bidirectional)
CS/LWAKE
2
TTL
Chip Select (TTL)
FAULT/TXE
8
14
OD
Fault Detect Output, Transmitter Enable (OD)
RESET
5
OD
RESET signal Output (OD)
Legend: O = Output, P = Power, I = Input, TTL = TTL input buffer, OD = Open-Drain output
Note:
CS/LWAKE should not be tied directly to
VREG as this could force the MCP202x into
Operation
mode
before
the
microcontroller is initialized.
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