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| 型号： | MCP25025-I/P |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDIP14 |
| 封装： | 0.300 INCH, PLASTIC, DIP-14 |
| 文件页数： | 20/64页 |
| 文件大小： | 1232K |
| 代理商： | MCP25025-I/P |
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2003 Microchip Technology Inc.
DS21664C-page 27
MCP2502X/5X
4.5
Automatic Transmission
The MCP2502X/5X can automatically initiate four
different message types to indicate the following
situations:
Edge detected on a digital input (TXID2).
Threshold exceeded on an analog input (TXID2).
Error condition (Read Error output message).
Scheduled transmissions (TXID0).
The buffers have an implied transmit priority, where
buffer 2 is the highest and buffer 0 is the lowest.
Therefore, multiple message buffers can be requested
for transmission and each one will be sent in order of
priority.
4.5.1
DIGITAL INPUT EDGE DETECTION
Each GPIO pin configured as a digital input can be
individually configured to automatically transmit a
message when a defined edge occurs, as explained in
the GPIO module section. When transmitting this
message, the MCP2502X/5X uses TXID2. The DLC is
set to two and the first two bytes of the Read A/D
registers (IOINTFL and GPIO) are sent.
4.5.2
ANALOG INPUT THRESHOLD
DETECTION
Each GPIO pin that has been configured as an analog
input can be individually configured to automatically
transmit a message when a threshold is exceeded as
described in the Analog-to-Digital Converter Module
section. The MCP2502X/5X sends TXID2 when
transmitting this message. The DLC is set to eight and
the eight bytes of the ‘Read A/D Registers’ are sent.
4.5.2.1
Hysteresis Function
This function is automatic and will insure that an analog
value that is on the compare edge (i.e., toggling LSb)
does not fill the CAN bus with continuous A/D message
transmissions.
The hysteresis uses the two LSb’s of the compare
register. These two bits are forced and are not
configurable by the user. They will be forced to either
b’00’
or b’11’, depending on the compare polarity. If
configured for A/D result > compare register, the
automatic transmission will occur when the A/D value
is greater than or equal to b’nnnn nnnn 11’ and
reset when less than or equal to b’nnnn nnnn 00’.
The opposite conditions must occur if the compare
polarity is set for A/D result < compare register.
A hysteresis example:
The user sets the upper-eight bits of the 10-bit
compare register (ADCMP0H). The lower-two bits
of the compare register are not configurable by
the user and are forced to either b’11’ or b’00’
depending on the polarity of the compare
threshold (i.e., transmit is triggered above or
below the compare value via the IOINTPO
register).
The user sets the polarity of the compare
threshold (IOINTPO). In this example, the
threshold is set for triggering a message on an
A/D > compare register. The two LSb’s are forced
to b’11’.
When the A/D conversion exceeds the compare
register (b’nnnn nnnn 11’), an automatic
transmission will occur once.
In order for the automatic transmission to occur
again, the A/D value must first drop below the
compare register b’nnnn nnnn 00’ and then
back above the compare register
b’nnnn nnnn 11’
.
FIGURE 4-1:
HYSTERESIS
FUNCTION
4.5.3
ERROR CONDITION
The MCP2502X/5X can be configured to automatically
transmit a message whenever one or more of the
following error conditions occur:
Receiver has entered error-warning state
Receiver has entered error-passive state
Transmitter has entered error-warning state
Transmitter has entered error-passive state
A Receive buffer has overflowed
Note:
The GPIO register that is sent with the
message (data byte 2) can be ignored if
there are no digital inputs enabled for
change-of-state, as it contains no useful
information for the Analog Input Threshold
Detect function.
LSbs = b’11’
Set to Trigger when A/D>Compare Register
LSbs = b’00’
LSbs = b’11’
LSbs = b’00’
Set to Trigger when A/D<Compare Register
A/D above compare,
Message sent
A/D above compare,
Message sent
A/D below compare,
Reset
A/D below compare,
Message sent
A/D below compare,
Message sent
A/D above compare,
Reset
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