参数资料
型号: MCP2515DM-PCTL
厂商: Microchip Technology
文件页数: 8/92页
文件大小: 0K
描述: BOARD DEMO FOR MCP2515
标准包装: 1
系列: PICtail™
主要目的: 接口,CAN 控制器
嵌入式: 是,MCU,8 位
已用 IC / 零件: MCP2515,MCP25020
主要属性: 带 CAN 输入/输出扩展器的独立 CAN 控制器
已供物品: 板,缆线,CD
产品目录页面: 685 (CN2011-ZH PDF)
相关产品: MCP2515T-I/ST-ND - IC CAN CONTROLLER W/SPI 20TSSOP
MCP2515T-I/SO-ND - IC CAN CONTROLLER W/SPI 18SOIC
MCP2515T-E/ST-ND - IC CAN CONTROLLER W/SPI 20TSSOP
MCP2515T-E/SO-ND - IC CAN CONTROLLER W/SPI 18SOIC
MCP2515-E/ST-ND - IC CAN CONTROLLER W/SPI 20TSSOP
MCP2515-E/SO-ND - IC CAN CONTROLLER W/SPI 18SOIC
MCP2515-E/P-ND - IC CAN CONTROLLER W/SPI 18DIP
MCP2515-I/ST-ND - IC CAN CONTROLLER W/SPI 20TSSOP
MCP2515-I/SO-ND - IC CAN CONTROLLER W/SPI 18SOIC
MCP2515-I/P-ND - IC CAN CONTROLLER W/SPI 18DIP
更多...
MCP2515
2.4.1
ACTIVE ERRORS
2.5
Overload Frame
If an error-active node detects a bus error, the node
interrupts transmission of the current message by
generating an active error flag. The active error flag is
composed of six consecutive dominant bits. This bit
sequence actively violates the bit-stuffing rule. All other
stations recognize the resulting bit-stuffing error and, in
turn, generate error frames themselves, called error
echo flags.
The error flag field, therefore, consists of between six
and twelve consecutive dominant bits (generated by
one or more nodes). The error delimiter field (eight
recessive bits) completes the error frame. Upon
completion of the error frame, bus activity returns to
normal and the interrupted node attempts to resend the
An overload frame, shown in Figure 2-5 , has the same
format as an active-error frame. An overload frame,
however, can only be generated during an interframe
space. In this way, an overload frame can be
differentiated from an error frame (an error frame is
sent during the transmission of a message). The
overload frame consists of two fields: an overload flag
followed by an overload delimiter. The overload flag
consists of six dominant bits followed by overload flags
generated by other nodes (and, as for an active error
flag, giving a maximum of twelve dominant bits). The
overload delimiter consists of eight recessive bits. An
overload frame can be generated by a node as a result
of two conditions:
aborted message.
1.
The node detects a dominant bit during the
Note:
Error echo flags typically occur when a
localized disturbance causes one or more
(but not all) nodes to send an error flag.
The remaining nodes generate error flags
in response (echo) to the original error
flag.
2.
interframe space, an illegal condition.
Exception: The dominant bit is detected during
the third bit of IFS. In this case, the receivers will
interpret this as a SOF.
Due to internal conditions, the node is not yet
able to begin reception of the next message. A
node may generate a maximum of two
2.4.2 PASSIVE ERRORS
If an error-passive node detects a bus error, the node
sequential overload frames to delay the start of
the next message.
transmits an error-passive flag followed by the error
delimiter field. The error-passive flag consists of six
consecutive recessive bits. The error frame for an error-
passive node consists of 14 recessive bits. From this, it
follows that unless the bus error is detected by an error-
active node or the transmitting node, the message will
Note:
2.6
Case 2 should never occur with the
MCP2515 due to very short internal
delays.
Interframe Space
continue transmission because the error-passive flag
does not interfere with the bus.
If the transmitting node generates an error-passive flag,
it will cause other nodes to generate error frames due to
the resulting bit-stuffing violation. After transmission of
an error frame, an error-passive node must wait for six
consecutive recessive bits on the bus before attempting
to rejoin bus communications.
The error delimiter consists of eight recessive bits, and
allows the bus nodes to restart bus communications
cleanly after an error has occurred.
DS21801G-page 8
The interframe space separates a preceding frame (of
any type) from a subsequent data or remote frame.
The interframe space is composed of at least three
recessive bits called the Intermission. This allows
nodes time for internal processing before the start of
the next message frame. After the intermission, the
bus line remains in the recessive state (bus idle) until
the next transmission starts.
? 2003-2012 Microchip Technology Inc.
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