参数资料
型号: MCP3905LT-E/SS
厂商: Microchip Technology
文件页数: 13/32页
文件大小: 0K
描述: IC ENERGY METERING 24SSOP
标准包装: 2,100
输入阻抗: 390 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.85V
电流 - 电源: 2.7mA
电源电压: 4.5 V ~ 5.5 V
测量仪表类型: 单相
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
MCP3905A/05L/06A
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 .
TABLE 3-1:
PIN FUNCTION TABLE
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
DV DD
HPF
AV DD
NC
CH0+
CH0-
CH1-
CH1+
MCLR
REFIN/OUT
A GND
F2
F1
F0
G1
G0
OSC1
OSC2
NC
NEG
D GND
HF OUT
F OUT1
F OUT0
Function
Digital Power Supply Pin
High-Pass Filters Control Logic Pin
Analog Power Supply Pin
No Connect
Non-Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Non-Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Master Clear Logic Input Pin
Voltage Reference Input/Output Pin
Analog Ground Pin, Return Path for internal analog circuitry
Frequency Control for HF OUT Logic Input Pin
Frequency Control for F OUT0/1 Logic Input Pin
Frequency Control for F OUT0/1 Logic Input Pin
Gain Control Logic Input Pin
Gain Control Logic Input Pin
Oscillator Crystal Connection Pin or Clock Input Pin
Oscillator Crystal Connection Pin or Clock Output Pin
No Connect
Negative Power Logic Output Pin
Digital Ground Pin, Return Path for Internal Digital Circuitry
High-Frequency Logic Output Pin (Intended for Calibration)
Differential Mechanical Counter Logic Output Pin
Differential Mechanical Counter Logic Output Pin
3.1
Digital V DD (DV DD )
3.3
Analog V DD (AV DD )
DV DD is the power supply pin for the digital circuitry
within the MCP3905A/05L/06A devices.
This pin requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation. Refer to Section 5.0 “Applications
Information” .
AV DD is the power supply pin for the analog circuitry
within the MCP3905A/05L/06A devices.
This pin requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation. Refer to Section 5.0 “Applications
Information” .
3.2
High-Pass Filter Input Logic Pin
3.4
Current Channel (CH0-, CH0+)
(HPF)
HPF controls the state of the high-pass filter in both
input channels. A logic ‘ 1 ’ enables both filters,
removing any DC offset coming from the system or the
device. A logic ‘ 0 ’ disables both filters, allowing DC
voltages to be measured.
? 2006-2011 Microchip Technology Inc.
CH0- and CH0+ are the fully differential analog voltage
input channels for the current measurement, containing
a PGA for small-signal input, such as shunt current
sensing. The linear and specified region of this channel
is dependant on the PGA gain. This corresponds to a
maximum differential voltage of ±470 mV/GAIN and
maximum absolute voltage, with respect to A GND , of
±1V. Up to ±6V can be applied to these pins without the
risk of permanent damage.
Refer to Section 1.0 “Electrical Characteristics” .
DS22011B-page 13
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