参数资料
型号: MCP4532T-103E/MS
厂商: Microchip Technology
文件页数: 6/88页
文件大小: 0K
描述: IC POT DGTL 10K SGL 8-MSOP
标准包装: 2,500
接片: 129
电阻(欧姆): 10k
电路数: 1
温度系数: 标准值 150 ppm/°C
存储器类型: 易失
接口: I²C(设备位址)
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-MSOP
包装: 带卷 (TR)
MCP453X/455X/463X/465X
DS22096A-page 14
2008 Microchip Technology Inc.
FIGURE 1-2:
I2C Bus Data Timing.
90
91
92
100
101
103
106
107
109
110
102
SCL
SDA
In
SDA
Out
TABLE 1-2:
I2C BUS DATA REQUIREMENTS (SLAVE MODE)
I2C AC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40
°C ≤ TA ≤ +125°C (Extended)
Operating Voltage VDD range is described in AC/DC characteristics
Param.
No.
Sym
Characteristic
Min
Max
Units
Conditions
100
THIGH
Clock high time
100 kHz mode
4000
ns
1.8V-5.5V
400 kHz mode
600
ns
2.7V-5.5V
1.7 MHz mode
120
ns
4.5V-5.5V
3.4 MHz mode
60
ns
4.5V-5.5V
101
TLOW
Clock low time
100 kHz mode
4700
ns
1.8V-5.5V
400 kHz mode
1300
ns
2.7V-5.5V
1.7 MHz mode
320
ns
4.5V-5.5V
3.4 MHz mode
160
ns
4.5V-5.5V
Note 1:
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
2:
A fast-mode (400 kHz) I2C-bus device can be used in a standard-mode (100 kHz) I2C-bus system, but the
requirement tSU;DAT ≥ 250 ns must then be met. This will automatically be the case if the device does not
stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal,
it must output the next data bit to the SDA line
TR max.+tSU;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I
2C bus specification) before
the SCL line is released.
3:
The MCP46X1/MCP46X2 device must provide a data hold time to bridge the undefined part between VIH
and VIL of the falling edge of the SCL signal. This specification is not a part of the I
2C specification, but
must be tested in order to ensure that the output data will meet the setup and hold specifications for the
receiving device.
4:
Use Cb in pF for the calculations.
5:
Not Tested
6:
A Master Transmitter must provide a delay to ensure that difference between SDA and SCL fall times do
not unintentionally create a Start or Stop condition.
7:
Ensured by the TAA 3.4 MHz specification test.
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