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参数资料
| 型号： | MCZ33884EGR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 9/21页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLE CONTACT MON 24-SOIC |
| 标准包装： | 1,000 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
33884
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
NORMAL AND PERIODIC
Bits [16:15] identify one of the three operating modes:
Normal, Polling, and Polling + INT Timer. The remaining bits
identify the device as the Master or a Slave, whether the
device has an interrupt that has not been cleared, and the
state of all the inputs.
MASL– MASTER/SLAVE IDENTIFICATION FLAG
This flag is the same as the state of the MASL pin. It
provides software identification of the configuration of each
IC.
INT – EXTERNAL INTERRUPT FLAG
This flag identifies this particular IC as the initiator of an
external interrupt. It is the inverse of INT.
These twelve flags indicate the state of all switch inputs:
TRI-STATE
All Tri-State inputs have their wetting and sustain currents
disabled. By definition, all disabled inputs return the following
value for the switch state whenever SPI data is exchanged:
Table 19. Normal and Periodic
MSB
LSB
Mode
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Normal
0
1
MASL
INT
SG6
SG5
SG4
SG3
SG2
SG1
SP3
SP2
SP1
SB2
SB1
Polling
1
0
x
—
Polling + INT Timer
1
INT
—
Note: The SPI response given while sending the command to exit Sleep mode should be ignored due to unknown power-up state.
Table 20. MASL Bit Definition
MASL
Device is a:
0
Slave
1
Master
Table 21. MASL Bit Definition
MASL
16
15
14
13
Type of Interrupt
Normal
0
1
x
0
Nothing Happened
—
1
Switch Interrupt
Polling
1
0
x
—
1
x
0
Nothing Happened
Polling + INT
Timer
—
1
Wake up Interrupt
SG[6:1] = Switch-to-ground flag
SB[2:1] = Switch-to-battery flag
SP[4:1] = Programmable switch flag
Table 22. Switch State Bit Definition
SGx, SBx, SPx
External
Switch is:
Mode
Input States Latched:
0
Open
Normal
At the moment CS
transitions to logic 0
1
Closed
Polling
Table 23. Tri-State Bit Definition
SGx, SBx, SPx
External Switch is:
0
Tri-State
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