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| 型号： | MCZ33905BS3EKR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 45/106页 |
| 文件大小： | 0K |
| 描述： | IC SBC CAN HS 3.3V 32SOIC |
| 标准包装： | 1,000 |
| 应用： | 系统基础芯片 |
| 接口： | CAN，LIN |
| 电源电压： | 5.5 V ~ 28 V |
| 封装/外壳： | 32-BSOP（0.295"，7.50mm 宽）裸露焊盘 |
| 供应商设备封装： | 32-SOICW 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
43
33903/4/5
FUNCTIONAL DEVICE OPERATION
WATCHDOG OPERATION
must include the last two. This completes the watchdog
refresh.
When multiple writes are used, the most significant bits are
sent first. The latest SPI command needs to be done inside
the open window time frame, if window watchdog is selected.
DETAIL SPI OPERATION AND SPI COMMANDS
FOR ALL WATCHDOG TYPES.
All SPI commands and examples do not use parity
functions.
In INIT mode, the watchdog type (window, timeout,
advance and number of SPI commands) is selected using the
register Init watchdog, bits 1, 2 and 3. The watchdog period
is selected using the TIM_A register. The watchdog period
selection can also be done in Normal mode or in Normal
Request mode.
Transition from INIT mode to Normal mode or from Normal
Request mode to Normal mode is done using a single
watchdog refresh command (SPI 0x 5A00).
While in Normal mode, the Watchdog Refresh Command
depends upon the watchdog type selected in INIT mode.
They are detailed in the paragraph below:
Simple Watchdog
The Refresh command is 0x5A00. It can be send any time
within the watchdog period, if the timeout watchdog operation
is selected (INIT-watchdog register, bit 1 WD N/Win = 0). It
must be send in the open window (second half of the period)
if the Window Watchdog operation was selected (INIT-
watchdog register, bit 1 WD N/Win = 1).
Advance Watchdog
The first time the device enters into Normal mode (entry on
Normal mode using the 0x5A00 command), Random
(RNDM) code must be read using the SPI command,
0x1B00. The device returns on MISO second byte the RNDM
code. The full 16 bits MISO is called 0x XXRD. RD is the
complement of the RD byte.
Advance Watchdog, Refresh by 1 SPI Command
The refresh command is 0x5ARD. During each refresh
command, the device will return on MISO, a new Random
Code. This new Random Code must be inverted and send
along with the next refresh command. It must be done in an
open window, if the Window operation was selected.
Advance Watchdog, Refresh by two SPI Commands:
The refresh command is split in two SPI commands.
The first partial refresh command is 0x5Aw1, and the
second is 0x5Aw2. Byte w1 contains the first four inverted
bits of the RD byte plus the last four bits equal to zero. Byte
w2 contains four bits equal to zero plus the last four inverted
bits of the RD byte.
During this second refresh command the device returns on
MISO a new Random Code. This new random code must be
inverted and send along with the next two refresh commands
and so on.
The second command must be done in an open window if
the Window operation was selected.
Advance Watchdog, Refresh by four SPI Commands
The refresh command is split into four SPI commands.
The first partial refresh command is 0x5Aw1, the second is
0x5Aw2, the third is 0x5Aw3, and the last is 0x5Aw4.
Byte w1 contains the first two inverted bits of the RD byte,
plus the last six bits equal to zero.
Byte w2 contains two bits equal to zero, plus the next two
inverted bits of the RD byte, plus four bits equal to zero.
Byte w3 contains four bits equal to zero, plus the next two
inverted bits of the RD byte, plus two bits equal to zero.
Byte w4 contains six bits equal to zero, plus the next two
inverted bits of the RD byte.
During this fourth refresh command, the device will return,
on MISO, a new Random Code. This new Random Code
must be inverted and send along with the next four refresh
commands.
The fourth command must be done in an open window if
the Window operation was selected.
PROPER RESPONSE TO INT
During a device detect upon an INT, the software handles
the INT in a timely manner: Access of the INT register is done
within two watchdog periods. This feature must be enabled
by SPI using the INIT watchdog register bit 7.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCZ33905BS3R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:SBC Gen2 with CAN High Speed and LIN Interface |
| MCZ33905BS5EK | 功能描述:CAN 接口集成电路 5V SBC HSCAN SNGL LIN RoHS:否 制造商:Texas Instruments 类型:Transceivers 工作电源电压:5 V 电源电流: 工作温度范围:- 40 C to + 85 C 封装 / 箱体:SOIC-8 封装:Tube |
| MCZ33905BS5EKR2 | 功能描述:CAN 接口集成电路 5V SBC HSCAN SNGL LIN RoHS:否 制造商:Texas Instruments 类型:Transceivers 工作电源电压:5 V 电源电流: 工作温度范围:- 40 C to + 85 C 封装 / 箱体:SOIC-8 封装:Tube |
| MCZ33905BS5R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:SBC Gen2 with CAN High Speed and LIN Interface |
| MCZ33905CD3EK | 功能描述:CAN 接口集成电路 3.3V SBC HSCAN DUAL LIN RoHS:否 制造商:Texas Instruments 类型:Transceivers 工作电源电压:5 V 电源电流: 工作温度范围:- 40 C to + 85 C 封装 / 箱体:SOIC-8 封装:Tube |
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