参数资料
型号: MCZ33937AEK
厂商: Freescale Semiconductor
文件页数: 12/48页
文件大小: 0K
描述: IC PRE-DRIVER 3PH ENH 54-SOIC
标准包装: 26
系列: SMARTMOS™
配置: 3 相桥
输入类型: 非反相
延迟时间: 265ns
电流 - 峰: 600mA
配置数: 1
输出数: 3
高端电压 - 最大(自引导启动): 15V
电源电压: 8 V ~ 40 V
工作温度: -40°C ~ 135°C
安装类型: 表面贴装
封装/外壳: 54-BSSOP(0.295",7.50mm 宽)裸露焊盘
供应商设备封装: 54-SOICW-EP
包装: 管件
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 8.0 V ? V PWR = V SUP ? 40 V ?? -40 ? C ? T A ? 135 ? C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at T A = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SUPERVISORY AND CONTROL CIRCUITS
Logic Inputs (Px_LS, Px_HS, EN1, EN2) (31)
V
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
V IH
V IL
2.1
0.9
Logic Inputs (SI, SCLK, CS ) (30) , (31)
V
High Level Input Voltage Threshold
Low Level Input Voltage Threshold
Input Logic Threshold Hysteresis (30)
Inputs Px_LS, SI, SCLK, CS , Px_HS, EN1, EN2
Input Pull-down Current, (Px_LS, SI, SCLK, EN1, EN2)
0.3 V DD ? V IN ? ? V DD ?
V IH
V IL
V IHYS
I INPD
2.1
100
8.0
250
0.9
450
18
mV
μA
Input Pull-up Current, (CS, Px_HS) (32)
I INPU
0 ? V IN ?? 0.7 ? V DD
(30)
Input Capacitance
0.0 V ? V IN ?? 5.5 V
C IN
10
15
25
μA
pF
RST Threshold (33)
V TH_RST
1.0
2.1
V
RST Pull-down Resistance
R RST
k ?
0.3 V DD ? V IN ? ? V DD
40
60
85
Power-OFF RST Threshold, (V DD Falling)
V POR
3.4
4.0
4.5
V
SO High Level Output Voltage
V SOH
V
I OH = 1.0 mA
SO Low Level Output Voltage
I OL = 1.0 mA
SO Tri-state Leakage Current
CS = 0.7 V DD , 0.3 V DD ? V SO ? 0.7 V DD
SO Tri-state Capacitance (30) , (34)
0.0 V ? V IN ?? 5.5 V
INT High Level Output Voltage
I OH = -500 μA
INT Low Level Output Voltage
I OL = 500 μA
V SOL
I SO_LEAK_T
C SO_T
V OH
V OL
0.9 V DD
-1.0
0.85 V DD
15
0.1 V DD
1.0
V DD
0.5
V
μA
pF
V
V
THERMAL WARNING
Thermal Warning Temperature (30) , (35)
Thermal Hysteresis (30)
T WARN
T HYST
150
8.0
170
10
185
12
°C
°C
Notes
30. This parameter is guaranteed by design, not production tested.
31. Logic threshold voltages derived relative to a 3.3 V 10% system.
32. Pull-up circuits will not allow back biasing of V DD.
33.
34.
35.
There are two elements in the RST circuit: 1) one generally lower threshold enables the internal regulator; 2) the second removes the
reset from the internal logic.
This parameter applies to the OFF state (tri-stated) condition of SO is guaranteed by design but is not production tested.
The Thermal Warning circuit does not force IC shutdown above this temperature. It is possible to set a bit in the MASK register to
generate an interrupt when overtemperature is detected, and the status bit will always indicate if any of the three individual Thermal
Warning circuits in the IC sense a fault.
33937A
Analog Integrated Circuit Device Data
12
Freescale Semiconductor
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