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| 型号： | MIC2184YM |
| 厂商： | Micrel Inc |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 16-SOIC |
| 标准包装： | 48 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 440kHz |
| 占空比： | 100% |
| 电源电压： | 2.9 V ~ 14 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1092 (CN2011-ZH PDF) |
| 其它名称： | 576-2161 MIC2184YM-ND |
MIC2184
Micrel, Inc.
V IN
1.5V
Typical
MIC2184
supply. The V IN P pin and CSH pin must be connected to the
same potential.
MOSFET Selection
R1
R2
EN/UVLO
(7)
140mV
Hysteresis
(typical)
Bias
Circuitry
The P-channel MOSFET must have a V GS threshold voltage
equal to or lower than the input voltage when used in a buck
converter topology. There is a limit to the maximum gate
charge the MIC2184 will drive. Higher gate charge MOSFET
will slow down the turn-on and turn-off time of the MOSFET.
Slower transition times will cause higher power dissipation in
Figure 3. UVLO Circuitry
The line voltage turn on trip point is:
R 2
V INPUT _ ENABLE = V THRESHOLD ×
R 1 + R 2
where:
V THRESHOLD is the voltage level of the internal
comparator reference, typically 1.5V
The input voltage hysteresis is equal to:
the MOSFET due to higher switching transition losses.
The MOSFET gate charge is also limited by power dissipation
in the MIC2184. The power dissipated by the gate drive
circuitry is calculated below:
P GATE_DRIVE = Q GATE × V IN P × f S
where: Qgate is the total gate charge of both the N and P-
channel MOSFETs.
f S is the switching frequency
V IN P is the gate drive voltage at the V IN P pin
V INPUT _ HYST = V HYST ×
where:
R1 + R 2
R 2
The graph in Figure 4 shows the total gate charge that can be
driven by the MIC2184 over the input voltage range, for
different values of switching frequency.
V HYST is the internal comparator hysteresis level,
typically 140mV.
V INPUT_HYST is the hysteresis at the input voltage
The MIC2184 will be disabled when the input voltage drops
back down to:
200x10 -9
180x10 -9
160x10 -9
140x10 -9
120x10 -9
Frequency vs.
Max. Gate Charge
200kHz
V INPUT_OFF =
V INPUT_ENABLE – V INPUT_HYST =
100x10 -9
80x10 -9
60x10 -9
500kHz
300kHz
400kHz
(V THRESHOLD – V HYST ) ×
R 2
R 1 + R 2
Either of 2 UVLO conditions will pull the soft start capacitor
40x10 -9
20x10 -9
0x10 0 3
5
600kHz
7 9 11 13 15 17
INPUT VOLTAGE (V)
low.
? When the V DD voltage drops below its
undervoltage lockout level.
? When the enable pin drops below the its enable
threshold
The internal bias circuit generates an internal 1.245V band-
gap reference voltage for the voltage error amplifier and a 3V
V DD voltage for the internal control circuitry. The V REF pin (pin
13) should be decoupled with a 0.1 μ f capacitor placed close
to the pin. The V DD pin must be decoupled with a 1 μ F ceramic
capacitor. The capacitor must be placed close to the V DD pin.
The other end of the capacitor must be connected directly to
the ground plane.
MOSFET Gate Drive
The MIC2184 is designed to drive a high side P-channel
MOSFET. The source pin of the P-channel MOSFET is
connected to the input of the power supply. It is turned on
when OUTP pulls the gate of the MOSFET low. The advan-
tage of using a P-channel MOSFET is that it does not require
a bootstrap circuit to boost the gate voltage higher than the
input, as would be required for an N-channel MOSFET.
The V IN P pin (pin 16) supplies the drive voltage to the gate
drive pin, OUTP. V IN P pin is usually connected to the input
Figure 4. MIC2184 Frequency vs Max. Gate Charge
Oscillator & Sync
The internal oscillator is free running and requires no external
components. The f/2 pin allows the user to select from two
switching frequencies. A low level set the oscillator frequency
to 400kHz and a high level set the oscillator frequency to
200kHz. The maximum duty cycle for both frequencies is
100%. This is another advantage of using a P-channel
MOSFET for the high-side drive; it can continuously turned
on.
A frequency foldback mode is enabled if the voltage on the
feedback pin (pin 6) is less than 0.3V. In frequency foldback,
the oscillator frequency is reduced by approximately a factor
of 4. Frequency foldback is used to limit the energy delivered
to the output during a short circuit fault condition.
The SYNC input (pin 11) lets the MIC2184 synchronize with
an external clock signal. The rising edge of the sync signal
generates a reset signal in the oscillator, which turns off the
low side gate drive output. The high side drive then turns on,
restarting the switching cycle. The sync signal is inhibited
when the controller operates in frequency foldback. The sync
signal frequency must be greater than the maximum speci-
M9999-042205
10
April 2005
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MIC2184YM TR | 功能描述:DC/DC 开关控制器 SO-16 Low Vin Buck PWM Control IC (Lead Free) RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MIC2184YQS | 功能描述:DC/DC 开关控制器 SO-16 Low Vin Synchronous Buck PWM Control IC (Lead Free) RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MIC2184YQS TR | 功能描述:DC/DC 开关控制器 SO-16 Low Vin Synchronous Buck PWM Control IC (Lead Free) RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MIC2185 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Low Voltage Synchronous Boost PWM Control IC |
| MIC2185_05 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Low Voltage Synchronous Boost PWM Control IC |
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