参数资料
| 型号： | MIC2550ABML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 6/11页 |
| 文件大小： | 0K |
| 描述： | IC USB TRANSCEIVER 16-MLF |
| 标准包装： | 5,000 |
| 类型： | USB 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | USB 2.0 |
| 电源电压： | 4 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN Exposed Pad，16-MLF? |
| 供应商设备封装： | 16-MLF?（4x4） |
| 包装： | 带卷 (TR) |
| 其它名称： | MIC2550ABMLTR MIC2550ABMLTR-ND |
MIC2550A
Micrel, Inc.
M9999-031805
4
March 2005
Symbol
Parameter
Condition
Min
Typ
Max
Units
Transceiver DC Characteristics
I
LO
Hi-Z State Data Line Leakage
0V < V
BUS < 3.3V, D+, D–, OE# = 1 pins only
–10
+10
A
V
DI
Differential Input Sensitivity
|(D+) – (D–)|, V
IN = 0.8V – 2.5V
0.2
V
CM
Differential Common-Mode Range
Includes V
DI range
0.8
2.5
V
SE
Single-Ended Receiver Threshold
0.8
2.0
V
Receiver Hysteresis, Note 6
200
mV
V
OL
Static Output Low, Note 5
OE# = 0, R
L = 1.5k to 3.6V
0.3
V
OH
Static Output High, Note 5
OE# = 0, R
L = 15k to GND
2.8
3.6
V
CRS
Output Signal Crossover Voltage
1.3
2.0
V
Note 6
C
IN
Transceiver Capacitance, Note 6
Pin to GND
20
pF
Z
DRV
Driver Output Resistance
Steady state drive, Note 6
618
Low-Speed Driver Characteristics, Note 7
t
R
Transition Rise Time
C
L = 50pF
75
ns
C
L = 600pF
300
ns
t
F
Transition Fall Time
C
L = 50pF
75
ns
C
L = 600pF
300
ns
t
R/tF
Rise and Fall Time Matching
T
R ÷ TF
80
125
%
V
CRS
Output Signal Crossover Voltage
1.3
2.0
V
Full-Speed Driver Characteristics, Note 7
t
R
Transition Rise Time
C
L = 50pF
4
20
ns
t
F
Transition Fall Time
C
L = 50pF
4
20
ns
t
R/tF
Rise and Fall Time Matching
T
R ÷ TF
90
111.11
%
V
CRS
Output Signal Crossover Voltage
1.3
2.0
V
Transceiver Timing, Note 7
t
PVZ
OE# to RCVR Tri-state Delay
Figure 1
15
ns
t
PZD
Receiver Tri-state to Transmit Delay
Figure 1
15
ns
t
PDZ
OE# to DRVR Tri-state Delay
Figure 1
15
ns
t
PZV
Driver Tri-state to Receiver Delay
Figure 1
15
ns
t
PLH
V+/V– to D+/D– Propagation Delay
Figure 4
15
ns
t
PHL
V+/V– to D+/D– Propagation Delay
Figure 4
15
ns
t
PLH
D+/D– to RCV Propagation Delay
Figure 3
15
ns
t
PHL
D+/D– to RCV Propagation Delay
Figure 3
15
ns
t
PLH
D+/D– to V+/D– Propagation Delay
Figure 3
8
ns
t
PHL
D+/D– to V+/D– Propagation Delay
Figure 3
8
ns
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
Note 4.
Applies to the VP, VM, RCV, OE#, SPD, and SUS pins.
Note 5.
Applies to D+, D–.
Note 6.
Not production tested. Guaranteed by design.
Note 7.
Characterized specification(s), but not production tested.
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