参数资料
| 型号： | MIC3003GFL TR |
| 厂商： | Micrel Inc |
| 文件页数： | 55/74页 |
| 文件大小： | 0K |
| 描述： | IC FOM MANAGEMENT W/CALIBR 24MLF |
| 标准包装： | 1,000 |
| 类型： | 激光二极管控制器（光纤） |
| 数据速率： | 10Gbps |
| 通道数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 电流 - 电源： | 2.3mA |
| 工作温度： | -40°C ~ 105°C |
| 封装/外壳： | 24-VFQFN 裸露焊盘，24-MLF? |
| 供应商设备封装： | 24-MLF?（3x3） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
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Micrel, Inc.
MIC3003GFL
D[7-3]
Bit(s)
Function
Reserved
Operation
Read-only; these bits always return 00000.
D[2:0]
RESETOUT
Controls the reset output at pin 2
(QGPO) when Reset mode is
selected (OEMCFG3-7 set to 1)
By default, these three bits are 000, and the QGPO output
is undriven.
If RESET mode is selected in OEMCFG3:
When the three bits are written to 111, QGPO’s open-drain
output will be driven low for 125 μ s (typical), after which
QGPO reenters the undriven state.
The RESETOUT field is cleared from 111 to 000 22.5 ms
(typical) after the de-assertion edge of QGPO. Other values
of this delay may be selected in the TRSTCLR[2:0] field in
OEMCFG2.
If Reset mode in OEMCFG3 is not selected, these three
bits have no function.
OEM Configuration Register 0 (OEMCFG0)
D[7]
RST
write only
D[6]
QGPOS
read/write
D[5]
DFLT
read-only
D[4]
OE
reserved
D[3]
MODREF
reserved
D[2]
VAUX[2]
read/write
D[1]
VAUX[1]
read/write
D[0]
VAUX[0]
read/write
Default value
Serial address
Byte address
0000 0000b = 00h
A6h
00 = 00h
A write to OEMCFG0 will result in any A/D conversion in progress being aborted and the result discarded. The A/D will begin a
new conversion sequence once the write operation is complete.
All bits in OEMCFG0 are non-volatile except DFLT and RST. A valid OEM password is required for access to this register.
D[7]
Bit(s)
RST
Function
Operation
0 = no action; 1 = reset
Issuing a software reset by setting RST high is equivalent to
a full power cycle of the MIC3003.
D[6]
QGPOS
Determines the state of QGPO in
GPO mode
If OEMCFG3 bit 7 (QGPOM) is low, this bit determines
whether the QGPO output is high (undriven) or low (driven-
open-drain).
If QGPOM is high (Reset mode), this bit has no function
D[5]
D[4]
DFLT
OE
Diode fault flag.
Output enable for SHDN, VMOD,
1 = diode fault; 0 = OK.
1 = enabled; 0 = hi-Z
and VBIAS.
D[3]
MODREF
Selects whether VMOD is
1 = VDD; 0 = GND
referenced to ground or VDD.
D[2:0]
VAUX[2:0]
Selects the voltage reported in
VINh:VINl.
000 = VIN
001 = VDDA
010 = VBIAS
011 = VMOD
100 = APCDAC
101 = MODDAC
110 = FLTDAC
July 2010
55
M9999-072910-A
hbwhelp@micrel.com or (408) 955-1690
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