参数资料
型号: MIC5191BMM
厂商: Micrel Inc
文件页数: 9/15页
文件大小: 845K
描述: IC REG CTRLR SGL POS ADJ 10MSOP
标准包装: 100
类型: 正,可调式
输出数: 1
输出电压: 可调
电流 - 电源: 15mA
输入电压: 1 V ~ 5.5 V
工作温度: -40°C ~ 125°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 管件
Micrel, Inc.
MIC5191
 
 
December 2006 
9
M9999-122206
 
Compensation
The   MIC5191   allows   the   flexibility   of   externally
controlling the gain and bandwidth. This allows the
MIC5191 design to be tailored to each individual design.
In designing the MIC5191, it is important to maintain
adequate phase margin. This is generally achieved by
having the gain cross the 0dB point with a single pole
20dB/decad roll-off. The compensation pin is configured
as Figure 3 demonstrates.
Error Amplifier
Driver
20pF
Internal
External
Comp
 
Figure 3. Internal Compensation
This places a pole at 2.3 kHz at 80dB and calculates as
follows.
20pF
3.42M&
2
1
F
P
?/DIV>
?/DIV>
=
?/DIV>
 
 
F
P
 = 2.32kHz
-20
0
20
40
60
80
100
0.01
0.1
1
10
100
1000    10000  100000
Frequency (KHz)
-45
0
45
90
135
180
225
 
Figure 4. Internal Compensation
Frequency Response
There is single pole roll off. For most applications, an
output capacitor is required. The output capacitor and
load resistance create another pole. This causes a two-
pole system and can potentially cause design instability
with inadequate phase margin. What should we do?
Answer:  we  compensate  it  externally.  By  providing  a 
dominant pole and zeroallowing the output capacitor
and load to provide the final polea net single pole roll
off is created, with the zero canceling the dominant pole.
Figure 5 demonstrates:
Error Amplifier
Driver
20pF
Internal
External
Comp
R
COMP
C
COMP
 
Figure 5. External Compensation
Placing an external capacitor (C
COMP
) and resistor
(R
COMP
) for the external pole-zero combination. Where
the dominant pole can be calculated as follows:
 
COMP
P
C
3.42M&
2
1
F
?/DIV>
?/DIV>
=
?/DIV>
 
And the zero can be calculated as follows:
 
COMP
COMP
Z
C
R
2
1
F
?/DIV>
?/DIV>
=
?/DIV>
 
This allows for high DC gain, and high bandwidth with
the output capacitor and the load providing the final pole.
-20
0
20
40
60
80
100
0.01
0.1
1
10
100
1000    10000  100000
Frequency (KHz)
-45
0
45
90
135
180
225
The Dominant Pole
External Zero
R
load
 x C
out
Pole
Ccomp
M
Fp
?/DIV>
?nbsp   42
.
3
2
1
Ccomp
Rcomp
Fz
?/DIV>
?/DIV>
2
1
 
Figure 6. External Compensation
Frequency Response
It is recommended that the gain bandwidth should be
designed to be less than 1 MHz. This is because most
capacitors lose capacitance at high frequency and
becoming resistive or inductive. This can be difficult to
compensate for and can create high frequency ringing or
worse, oscillations.
By   increasing   the   amount   of   output   capacitance,
transient response can be improved in multiple ways.
First, the rate of voltage drop vs. time is decreased.
Also, by increasing the output capacitor, the pole formed
by the load and the output capacitor decreases in
frequency.   This   allows   for   the   increasing   of   the
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