参数资料
型号: MIC706N
厂商: Micrel Inc
文件页数: 2/7页
文件大小: 0K
描述: IC SUPERVISOR 4.4V VTH 8-DIP
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 4.4V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
MIC705/06/07/08
Pin Con?guration
Micrel, Inc.
MR
1
8
WDO
V CC
GND
PFI
MR
V CC
GND
PFI
2
3
4
1
2
3
4
MIC705
MIC706
MIC707
MIC708
7
6
5
8
7
6
5
RESET
WDI
PFO
RESET
RESET
NC
PFO
8-Pin PDIP Package
8-Pin SOIC Package
Pin Description
Pin Number
MIC705/06
1
2
3
4
5
6
N/A
7
8
N/A
Pin Number
MIC707/08
1
2
3
4
5
N/A
6
7
N/A
8
Pin Name
/MR
VCC
GND
PFI
/PFO
WDI
N/C
/RESET
/WDO
RESET
Pin Function
Manual Reset Input forces /RESET to assert when pulled below 0.8V. An
internal pull-up current of 250μA on this input forces it high when left ?oating.
this input can also be driven from TTL or CMOS logic.
Primary supply input, +5V
IC ground pin, 0V reference
Power Fail Input. Internally connected to the power fail comparator which
is referenced to 1.25V. The Power Fail Output (/PFO) remains high if PFI
is above 1.25V. PFI should be connected to GND or V OUT if the power fail
comparator is not used.
Power Fail Output. The power fail comparator is independent of all other
function on this device.
Watch Dog Input. The WDI input monitors microprcessor activity, an internal
watchdog timer resets itself with each transition on the watchdog input. If the
WDIpin is held high or low for longer than the watchog timeout period, /WDO
is forced to active low. the watchdog function can be diabled by ?oating the
WDI pin.
Not Internally Connected
/RESET is asserted if either V CC goes below the reset threshold voltage or
by low signal on the manual reset input (/MR). /RESET remains asserted for
one reset timeout period (200ms) after V CC exceeds the reset threshold volt-
age or after the manual reset pin transition from low to high. The watchdog
timer will not assert /RESET unless /WDO is connected to /MR
Output for the Watchdog Timer. The watchdog timer resets itself with each
transition o the watchdog input. If the WDI pin is held high or low for longer
than the watchdog timeout period, /WDO is forced low. /WDO will also be
forced low id V CC is below the reset threshold voltageand will remain low
until V CC returns to a valid level.
RESET is the compliment of /RESET and is asserted if either V CC goes be-
low the reset threshold voltage or by a low signal on the manual reset input
(/MR). RESET is suitable for microprocessor systems that use active high
reset.
MIC705/06/07/08
2
January 2006
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