参数资料
型号: MIC9131YM TR
厂商: Micrel Inc
文件页数: 12/19页
文件大小: 0K
描述: IC CTRLR DC-DC PWM HV HS 16-SOIC
标准包装: 2,500
应用: 控制器,电信
输入电压: 9 V ~ 18 V
输出数: 1
输出电压: 4.7 V ~ 5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 带卷 (TR)
其它名称: MIC9131YMTR
MIC9131YMTR-ND
MIC9131
Micrel, Inc.
T P_OSCILLATOR = t CHARGE + t DISCHARGE + t DELAY
VCC
2
f S _ OSCILLATOR =
f S OUTPU =
× f S OSCILLATOR
4
3V
1μF
2N3904
4.7μF
AGND
75ns
33pF
Where t DELAY = 75ns
1
T P _ OSCILLATOR
1
_ _
The timing capacitor, C OSC , should be an NPO ceramic or a
temperature stable ?lm capacitor. Care must be taken when
using capacitor values less than 47pF. The high impedance of
a small value capacitor makes the OSC pin more susceptible
to switching noise. Also, the input capacitance of the OSC pin
and the stray capacitance of the board will have a noticeable
effect on the oscillator frequency.
SYNC 5
VBIAS 9
R OSC
OSC 4
C OSC
75ns
1-shot
11
AGND
V OSC
Gate Drive
(pin 16)
t ON
t PERIOD
Figure 5
Higher Switching Frequencies
The MIC9131 is capable of very high switching frequencies.
One of the limitations on the maximum frequency is the cur-
rent capability of the 5V regulator supplying the oscillator
and V BIAS . By powering V BIAS with an external source, e.g.
linear regulator much higher switching frequencies can be
achieved. A simple way of using an external current source
is to set an NPN as an emitter follower. Figure 5b shows the
MIC9131 oscillator frequency set to 4MHz using an external
NPN. The emitter followerj circuit allows the current to be
supplied by V CC while the voltage is regulated to a diode
drop below V BIAS . This con?guration is quite stable over
temperature and voltage variations.
SYNC 5
VBIAS 9
3V
R OSC
1.6k OSC 4
4.7μF
C OSC
11
1-shot
Figure 5a
Oscillator Synchronization
The switching frequency of the MIC9131 can be synchronized
to an external oscillator or frequency source. Figure 6 shows
the relationship between the sync input, oscillator waveform
and gate drive output. The external frequency should be set
at least 15% greater than the free running oscillator frequency
to account for tolerances in the oscillator circuit and external
components. The positive edge of the sync signal resets
the oscillator. The sync pulse frequency, like the oscillator,
is four times the gate drive frequency. When an external
sync signal is applied, the peak amplitude of the oscillator
signal (pin 4) is less than when it is free running because
the oscillator signal is terminated before it reaches its 3V
(typical) amplitude. When not used, the sync pin should
be connected to ground to prevent noise from erroneously
resetting the oscillator.
TIME (500ns/div)
Figure 6. Sync Waveform
Soft Start Circuit
The soft start is programmed by a capacitor on the soft start
pin. A 4μA current source charges up the capacitor. At power
up, the SS pin is discharged. Once the UVLO and enable
functions release the soft start circuit, the voltage of the ca-
pacitor increases. The active voltage range of the soft start
pin is from typically from 0.9V to 1.7V. The internal current
source increases the voltage on the soft start capacitor to
approximately 4V. The soft start pin and the current sense
voltage are connected to a comparator in the MIC9131. The
voltage from the soft start pin effectively limits the peak current
through the current sense resistor by prematurely terminating
the on-time of the gate drive output. Referring to Figure 1,
with the soft start voltage low, the duty cycle of the output is
at a minimum. As the soft start voltage increases, the duty
M9999-080206
12
August 2006
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