参数资料
型号: MICRF506BML TR
厂商: Micrel Inc
文件页数: 26/42页
文件大小: 0K
描述: TXRX ISM 400MHZ 32-MLF
标准包装: 1,000
频率: 410MHz ~ 450MHz
数据传输率 - 最大: 200kBaud
调制或协议: FSK
应用: ISM
功率 - 输出: 11dBm
灵敏度: -113dBm
电源电压: 2 V ~ 2.5 V
电流 - 接收: 12mA
电流 - 传输: 10.5mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘,32-MLF?
包装: 带卷 (TR)
其它名称: MICRF506BMLTR
MICRF506BMLTR-ND
Micrel
Modulator
MICRF506BML/YML
A6..A0
0000100
0000101
0000110
0000111
D7
Mod_F2
-
-
BitRate_clkS1
D6
Mod_F1
-
Mod_clkS2
BitRate_clkS0
D5
Mod_F0
‘0’
Mod_clkS1
RefClk_K5
D4
Mod_I4
‘1’
Mod_clkS0
RefClk_K4
D3
Mod_I3
Mod_A3
BitSync_clkS2
RefClk_K3
D2
Mod_I2
Mod_A2
BitSync_clkS1
RefClk_K2
D1
Mod_I1
Mod_A1
BitSync_clkS0
RefClk_K1
D0
Mod_I0
Mod_A0
BitRate_clkS2
RefClk_K0
The
modulator
will create
a waveform
with
M od_clk a
programmable amplitude and frequency. This
waveform is fed into a modulation varactor in the
VCO, which will create the desired frequency
Mod_clkb
modulation.
The frequency
spectrum
can be
narrowed by increasing the rise-and fall times of the
waveform.
The modulator waveform is created by charging and
discharging a capacitor. A modulator clock controls
the timing, as shown in Figure19. For every rise-and
fall edge, 4 clock periods are being used. The
charging current during these 4 clock periods are not
equal, this is to reduce the high frequency
components in the waveform, which in turn will
narrow the frequency spectrum.
The frequency deviation can be set in three different
ways, as will be explained below. A formula for
setting the desired deviation is given at the end of
this chapter.
Modulator Clock
Modulator Waveform
Figure 19. Modulator Waveform and Clock
Modulator Clock
Mod_clkb > Mod_clka
Figure 20. Two Different Modulator Clock Setting
A f MOD_CLK of 8 times the bit rate (as in Figure 20)
corresponds to a signal filtered in a Gaussian filter
with a Bandwidth Period product (BT) of 1. When BT
is increased, the waveform will be less filtered.
Minimum BT is 1 (f MOD_CLK is 8 times the bitrate).
Figure 20 shows two waveforms with BT=1 and
BT=2, i.e. the f MOD_CLK is 8 and 16 times higher than
the bit rate. When changing the BT factor, the
charge-and discharge times will also be changed,
and therefore the frequency deviation, as shown in
Figure 19.
Modulator Current
The current used during the rise- and fall times can
be programmed with the Mod_I4..Mod_I0 bit, the
last one being LSB. Figure 21 shows two waveforms
generated with two different currents, where
Mod _ Ia > Mod _ Ib . Higher current will give a
higher frequency deviation and vice versa. The
effect of modulator clock and MOD_1 is illustrated
by:
The modulator clock frequency is set by:
f DEVIATION ×
MOD_1
f MOD_CLK
f MPOD_CLK =
f XCO
Refclk_K × 2 (7 ? Mod_clkS )
To avoid saturation in the modulator it is important
not to exceed maximum Mod_I. Maximum Mod_I for
where f MOD_CLK is the modulator clock shown in
Figure 19, f XCO is the crystal oscillator frequency
Refclk_K is a 6 bit number and Mod_clkS is a 3 bit
number. Mod_clkS can be set to a value between 0
and 7. The modulator clock frequency should be set
according to the bit rate and shaping.
a given fMOD_clk is given by:
MOD_I MAX = INT(f MOD_CLK ? 28 × 10 6 ) - 1
where INT() returns the integer part of the argument.
July 2006
26
M9999-092904
+1 408-944-0800
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