MK1449B
Sound/SCSI+Fast Ethernet Clock
MDS 1449B C
4
Revision 120799
Printed 11/15/00
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126 (408)295-9800tel www.icst.com
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Inc. (ICS) assumes no responsibility for either its use or for
the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any
ICS product for use in life support devices or critical medical instruments.
Ordering Information
Part/Order Number
Marking
Package
Temperature
MK1449S
8 pin SOIC
0 to 70 °C
MK1449STR
MK1449S
8 pin SOIC on tape and reel
0 to 70 °C
MK1449SI
8 pin SOIC
-40 to 85 °C
MK1449SITR
MK1449SI
8 pin SOIC on tape and reel
-40 to 85 °C
External Components / Crystal Selection
The MK1449B requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must
be connected close to the MK1449B to minimize lead inductance. No external power supply filtering is
required for this device. 33
terminating resistors can be used next to the CLK pins. The total on-chip
capacitance is approximately 13 pF, so a parallel resonant, fundamental mode crystal should be used. For
crystals with a specified load capacitance greater than 13 pF, crystal capacitors should be connected from
each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should be = (CL-13)*2,
where CL is the crystal load capacitance in pF. These external capacitors are only required for applications
where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no
capacitors on either).
8 pin SOIC
C
A
B
D
E
H
e
A1
Pin 1
L
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.053
0.069
1.35
1.75
A1
0.004
0.0098
0.10
0.25
B
0.013
0.020
0.33
0.51
C
0.0075 0.0098
0.19
0.25
D
0.189
0.197
4.80
5.00
E
0.150
0.157
3.80
4.00
H
0.228
0.244
5.80
6.20
e
.050 BSC
1.27 BSC
L
0.016
0.05
0.41
1.27
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC pub. no. 95)