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参数资料
| 型号： | MK2049-34SAILF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.300 INCH, ROHS COMPLIANT, SOIC-20 |
| 文件页数： | 6/8页 |
| 文件大小： | 148K |
| 代理商： | MK2049-34SAILF |
3.3 Volt Communications Clock VCXO PLL
MDS 2049-34A B
6
Revision 060105
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
MK2049-34A
External Component Selection
The MK2049-34A requires a minimum number of external components for proper operation. Decoupling capacitors
of 0.01
F must be connected between VDD and GND pins close to the chip (especially pins 4 and 7, 15 and 17),
and 33
series terminating resistors should be used on clock outputs with traces longer than one inch (assuming
50
traces). The selection of additional external components is described in the following sections.
Loop Filter
Information on how to configure the external loop filter, connected between pins CAP1 and CAP2, can be found at
http://www.icst.com/products/telecom/telecom.htm and http://www.icst.com/PDF/MK2049-3x%20Addendum.pdf.
Crystal Operation
The MK2049-34A operates by phase locking the input signal to a VCXO which consists of the recommended
pullable VCXO crystals and the integrated VCXO oscillator circuit on the MK2049-34A. To achieve the best
performance and reliability, the layout guidelines shown on the previous page should be closely followed.
The frequency of oscillation of a quartz crystal is determined by its cut and by the load capacitors connected to it.
The MK2049-34A has variable load capacitors on-chip which “pull” or change the frequency of the crystal. External
stray capacitance must be kept to a minimum to ensure maximum pullability of the crystal. To achieve this, the
layout should use short traces between the MK2049-34A and the crystal.
For the VCXO to operate correctly, a pullable crystal must be used. For more information, including a list of
approved crystals, please refer to application note MAN05 (http://www.icst.com/products/summary/man05.htm).
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK2049-34A. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7 V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
-40 to +85
°C
Storage Temperature
-65 to +150
°C
Junction Temperature
175
°C
Soldering Temperature
260
°C (10 to 20 seconds max.)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK2049-34SAILFTR | 功能描述:时钟合成器/抖动清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MK2049-34SAITR | 功能描述:IC VCXO PLL CLK SYNTH 20-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK2049-34SI | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-34SITR | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-35 | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
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