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参数资料
| 型号： | MK20N512VML100R |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | RISC MICROCONTROLLER, PBGA104 |
| 封装： | 8 X 8 MM, MAPBGA-104 |
| 文件页数： | 16/61页 |
| 文件大小： | 888K |
| 代理商： | MK20N512VML100R |
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J14
J13
TCLK
TRST
Figure 8. TRST timing
6.2 System modules
There are no specifications necessary for the device's system modules.
6.3 Clock modules
6.3.1 MCG Specifications
Table 12. MCG specifications
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
fints_ft
Internal reference frequency (slow clock) — facto‐
ry trimmed at nominal VDD and 25°C
—
32.768
—
kHz
fints_t
Internal reference frequency (slow clock) — user
trimmed
31.25
—
39.0625
kHz
tirefsts
Internal reference (slow clock) startup time
—
TBD
4
s
Δfdco_res_t Resolution of trimmed DCO output frequency at
fixed voltage and temperature — using SCTRIM
and SCFTRIM
—
± 0.1
± 0.3
%fdco
Δfdco_res_t Resolution of trimmed DCO output frequency at
fixed voltage and temperature — using SCTRIM
only
—
± 0.2
± 0.5
%fdco
Δfdco_t
Total deviation of trimmed DCO output frequency
over voltage and temperature
—
+ 0.5
- 1.0
± 3.5
%fdco
Δfdco_t
Total deviation of trimmed DCO output frequency
over fixed voltage and temperature range of 0–
70°C
—
± 0.5
± TBD
%fdco
fintf_ft
Internal reference frequency (fast clock) — factory
trimmed at nominal VDD and 25°C
3.875
4
4.125
MHz
fintf_t
Internal reference frequency (fast clock) — user
trimmed
3
—
5
MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
23
Preliminary
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