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参数资料
型号： MK2743STR
厂商： INTEGRATED DEVICE TECHNOLOGY INC
元件分类： 时钟产生/分配
英文描述： 66 MHz, VIDEO CLOCK GENERATOR, PDSO16
封装： 0.150 INCH, SOIC-16
文件页数： 3/4页
文件大小： 30K
代理商： MK2743STR
MK2743
C-Cube MPEG Encoder Clock Source
MDS2743B
3
Revision 12047
Printed 12/4/97
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
ICRO
CLOCK
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 20 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
4.5
5.5
V
Input High Voltage, VIH, X1/ICLK pin only
3.5
2.5
V
Input Low Voltage, VIL, X1/ICLK pin only
2.5
1.5
V
Input High Voltage, VIH
2
V
Input Low Voltage, VIL
0.8
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD
No Load, note 2
45
mA
Short Circuit Current
Each output
±100
mA
Input Capacitance
7
pF
Frequency error, ACLK
0
ppm
Frequency error, 24.576 MHz clock
40
ppm
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Frequency
27.000
MHz
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At 1.4V
40
60
%
Absolute Jitter, short term
200
ps
Skew of PCLK, PCLK/2, and PCLK/4
Rising edges at 1.4V
-500
0
500
ps
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With NUCLK at 40MHz, PCLK at 66.0MHz, and ACLK at 16.93MHz.
External Components
The MK2743 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1F should be connected between VDD and GND (pins 4 and 5, and 13 and 12), as close
to the MK2743 as possible. A series termination resistor of 33
may be used for each clock output. If a
clock input is not used, the 27.00 MHz crystal must be connected as close to the chip as possible. The
crystal should be a fundamental mode, parallel resonant, 50 ppm or better. Crystal capacitors should be
connected from pins X1 to ground and X2 to ground. The value (in pF) of these crystal capacitors should
be = (CL-4)*2, where CL is the crystal load capacitance in pF. So for a crystal with 16pF load capacitance,
the crystal capacitors should be 24pF each.
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相关代理商/技术参数
参数描述
MK2745-21 制造商:ICS 制造商全称:ICS 功能描述:DVD/MPEG Clock Source
MK2745-21S 功能描述:IC CLK SOURCE DVD/MPEG 16-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:*
MK2745-21SLF 功能描述:时钟合成器/抖动清除器 DVD/MPEG CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel
MK2745-21SLFTR 功能描述:时钟合成器/抖动清除器 DVD/MPEG CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel
MK2745-21STR 功能描述:IC CLK SOURCE DVD/MPEG 16-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:*
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