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参数资料
| 型号： | MK2772-01SLFTR |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 27 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | LEAD FREE, SOIC-20 |
| 文件页数： | 2/4页 |
| 文件大小： | 483K |
| 代理商： | MK2772-01SLFTR |
MK2772-01
VCXO and Set-Top Clock Source
MDS 2772-01 D
2
Revision 102704
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
Pin Descriptions
Key: I = Input, TI = tri-level input, VI = VCXO input, O = output, P = power supply connection, X = crystal connection
Pin Assignment
Number
Name
Type Description
1
ACS1
TI
Audio Clock Select 1. Determines ACLK frequency, as per table above.
2
X2
X
Crystal connection. Connect to a pullable 13.5 MHz crystal.
3
X1
X
Crystal connection. Connect to a pullable 13.5 MHz crystal.
4
VDD
P
Connect to +5V, and other VDDs.
5
VIN
VI
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
6
VDD
P
Connect to +5V.
7
GND
P
Connect to ground.
8
16.67M
O
16.6667 MHz processor clock output.
9
3.68M
O
3.6864 MHz clock output.
10
ACLK
O
Audio Clock Output determined by ACS1,0. Per table above.
11
INMUXSEL
I
Input Multiplexer Select. Selects either the internal VCXO/PLL output, or the clock on pin 19.
12
11.06M
O
11.0592 MHz clock output.
13
27M
O
27.00 MHz clock output.
14
GND
P
Connect to ground.
15
VDD
P
Connect to +5V.
16
27M
O
27.00 MHz clock output.
17
GND
P
Connect to ground.
18
27M
O
27.00 MHz clock output.
19
EXTCLKIN
I
External Clock Input. Connect an external 27 MHz clock to this pin for glitch free switching.
20
ACS0
TI
Audio Clock Select 0. Determines ACLK frequency, as per table above.
1
16
2
3
4
15
14
13
VDD
GND
X2
VDD
GND
5
6
7
8
12
11
10
9
3.68M
EXTCLKIN
X1
ACS1
27M
ACS0
27M
INMUXSEL
ACLK
16.67M
18
17
19
20
VIN
VDD
11.06M
GND
ACS1 ACS0 ACLK (MHz)
0
8.192
0
M
16.384
0
1
11.2896
M
0
16.9344
M
22.5792
M
1
18.432
1
0
12.288
1
M
24.576
1
5.6448
INMUXSEL
27 MHz Input
0
EXTCLKIN
1
Internal VCXO
Audio Clock Select
Input Source Select
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