参数资料
型号: MK3771-17RLFTR
元件分类: 时钟产生/分配
英文描述: 108 MHz, OTHER CLOCK GENERATOR, PDSO28
封装: 0.150 INCH, 0.025 INCH PITCH, LEAD FREE, MO-153, SSOP-28
文件页数: 1/8页
文件大小: 182K
代理商: MK3771-17RLFTR
MK3771-17
MDS 3771-17 C
1
Revision 083104
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
VCXO and HDTV Set-Top Clock Source
Description
The MK3771-17 is a low cost, low jitter,
high-perfomance VCXO and clock synthesizer
designed for set-top boxes and HDTV receivers. The
on-chip Voltage Controlled Crystal Oscillator accepts a
0 to 3.3 V input voltage to cause the output clocks to
vary by ±100 ppm. Using ICS’s patented VCXO and
analog Phase-Locked Loop (PLL) techniques, the
device uses an inexpensive 13.5 MHz crystal input to
produce multiple output clocks including selectable
BCLK, a selectable audio clock, two communications
clocks, a 13.5 MHz clock, and three 27 MHz clocks. All
clocks are frequency locked to the 27 MHz output (and
to each other) with zero ppm error, so any output can
be used as the VCXO output.
Features
Packaged in 28-pin SSOP
Available in Pb (lead) free package
HDTV frequencies of 74.25 and 74.175824 MHz
On-chip patented VCXO with pull range of 200 ppm
(minimum)
VCXO tuning voltage of 0 to 3.3 V
Supports Ethernet with 20 and 25 MHz clocks
Modem clocks of 11.0592 and 24.576 MHz option
Audio clocks support 32 kHz, 44.1 kHz, 48 kHz and
96 kHz sampling rates
Zero ppm synthesis error in all clocks (all exactly
track 27MHz VCXO)
Uses an inexpensive 13.5 MHz crystal
Full CMOS output swings with 12 mA output
drive capability at TTL levels
Advanced, low power, sub-micron CMOS process
3.3 V ±5% operating supply
Block Diagram
Voltage
Controlled
Crystal
Oscillator
Divide
Logic
PLL Clock
Synthesis
Circuitry
AS2:0
BS1, BS0
CS
VIN
3
Audio Clock
BCLK
13.5 MHz
pullable crystal
XI
XO
2
CCLK1
CCLK2
108 MHz or 27 MHz
54 MHz or 27 MHz
27 MHz
13.5 MHz or 27 MHz
X8
PLL
VS
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