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参数资料
| 型号： | ML54053 |
| 厂商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分类： | 存储控制器/管理单元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PQFP120 |
| 封装： | 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-120 |
| 文件页数： | 17/26页 |
| 文件大小： | 235K |
| 代理商： | ML54053 |
Semiconductor
ML54053
20/22
9. BUS SPECIFICATIONS
9.1
I/O Mode
The I/O mode conforms to CompactFlash and IDE specifications.
9.2
Bus Timing Specifications
Bus timing conforms to CompactFlash, IDE and NAND flash memory specifications.
9.3
Power ON/OFF, Reset, Busy Timing
Parameter
Symbol
VI (CE)
Condition
0 V VCC < 2.0 V
2.0 V VCC < VIH
Specified Value
Unit
0VI Max.
-CE Signal Level
ms
Reset Setup Time
tsu (RESET)
—
TBD
Reset Width
tw (RESET)
—
TBD
Min.
Max.
VCC – 0.1
VI Max.
—
TBD
—
TBD
th (Hi-Z RESET)
ts (Hi-Z RESET)
VIH VCC
VIH
VI Max.
Ready Release Delay Time
td (BSY)
—
TBD
-CE Recovery Time
trec (VCC)
—
TBD
VCC Rise Time
tpr
10%(VCC + 5%) 90% *1
TBD
VCC Fall Time
tpf
(VCC – 5%) 90%10% *1
TBD
ms
V
*1:
tpr and tpf are defined as the time of the “straight-line change from 10% to 90% of VCC”,
and vice-versa. Even if the rise and fall waveforms are non-linear, the maximum slope of
the waveform must meet these specifications.
+RDY/-BSY
RESET
tw(RESET)
td(BSY)
th(Hi-Z RESET)
ts(Hi-Z RESET)
VIH
tsu(CE)
Hi-Z
VCC
-CE1, -CE2
VCC
tsu(RESET)
tpr
2 V
,
trec(VCC)
tpf
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