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参数资料
| 型号： | ML63295A-XXXWA |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC212 |
| 封装： | 8.25 X 8.20 MM, 0.35 MM HEIGHT, DIE-212 |
| 文件页数： | 11/39页 |
| 文件大小： | 253K |
| 代理商： | ML63295A-XXXWA |
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FEDL63295A-02
1Semiconductor
ML63295A
18/38
Table 2 Pin Descriptions (Secondary Functions) (continued)
Function
Symbol
Pin No.
Pad No.
Type
Description
PC.0/RXD
192
8
I
Serial port receive data input pin
PC.1/TXC
191
7
I/O
Sync serial port clock input-output pin
Transmit clock output when this device is used as a
master processor.
Transmit clock input when this device is used as a
slave processor.
PC.2/RXC
190
6
I/O
Sync serial port clock input-output pin
Receive clock output when this device is used as a
master processor.
Receive clock input when this device is used as a
slave processor.
Serial
Port
PC.3/TXD
189
5
O
Serial port transmit data output pin
PE.0/SIN
188
4
I
Shift register receive data input pin
PE.1/SOUT
187
3
O
Shift register transmit data output pin
Shift
Register
PE.2/SCLK
186
2
I/O
Shift register clock input-output pin.
Clock output when this device is used as a master
processor.
Clock input when this device is used as a slave
processor.
P4.0/A0
224
40
P4.1/A1
223
39
P4.2/A2
222
38
P4.3/A3
221
37
P5.0/A4
220
36
P5.1/A5
219
35
P5.2/A6
218
34
P5.3/A7
217
33
P6.0/A8
216
32
P6.1/A9
215
31
P6.2/A10
214
30
P6.3/A11
213
29
P7.0/A12
212
28
P7.1/A13
211
27
P7.2/A14
210
26
P7.3/A15
209
25
O
Address output bus for external memory
P9.0/D0
204
20
P9.1/D1
203
19
P9.2/D2
202
18
P9.3/D3
201
17
PA.0/D4
200
16
PA.1/D5
199
15
PA.2/D6
198
14
PA.3/D7
197
13
I/O
Data bus for external memory
P8.0/
RD
208
24
O
Read signal output pin for external memory
(negative logic)
External
Memory
P8.1/
WR
207
23
O
Write signal output pin for external memory
(negative logic)
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