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参数资料
| 型号： | ML67Q5003LA |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PBGA144 |
| 封装： | 11 X 11 MM, 0.80 MM PITCH, PLASTIC, LFBGA-144 |
| 文件页数： | 14/25页 |
| 文件大小： | 233K |
| 代理商： | ML67Q5003LA |
FEDL675001-01
OKI Semiconductor
ML675001/67Q5002/67Q5003
20/24
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD_CORE = 2.25 to 2.75V, VDD_IO = 3.0 to 3.6V, Ta = –40 to +85°C)
Item
Symbol
Conditions
Minimum
Typical
Maximum
Unit
High level input voltage
VIH
VDD_IOx0.8
—
VDD_IO+0.3
Low level input voltage
VIL
–0.3
—
VDD_IOx0.2
VT+
—
1.6
2.1
VT
0.7
1.1
—
Schmitt input buffer
threshold voltage
VHYS
—
0.4
0.5
—
IOH = –100 A
VDD–0.2
—
High level output voltage
VOH
IOH = –4 mA
2.35
—
Low level output voltage
IOL = 100 A
—
0.2
Low level output voltage *
1
IOL = 4 mA
—
0.45
Low level output voltage *
2
VOL
IOL = 6 mA
—
0.45
V
Input leak current *
3
IIH/IIL
VI = 0 V/VDD_IO
–50
—
50
Input leak current *
4
IIL
VI = 0 V
Pull-up resistance of
50 k
–200
–73
–10
Input leak current *
5
II
VI = AVDD / 0 V
–5
—
5
Output leak current
ILO
VO = 0 V/VDD_IO
–50
—
50
A
Input pin capacitance
CI
—
6
—
Output pin capacitance
CO
—
9
—
I/O pin capacitance
CIO
—
10
—
pF
Analog-to-digital
converter operative *
6
—
320
650
Analog reference power
supply current
IREF
Analog-to-digital
converter stopped
—
1
2
IDDS_CORE
—
20
150
Current consumption
(STANDBY)
IDDS_IO
Ta = 25
°C *7
—
10
40
A
IDDH_CORE
—
37
55
Current consumption
(HALT) *
8
IDDH_IO
—
6
10
IDD_CORE
—
75
120
Current consumption (RUN)
*
9
IDD_IO
fOP = 60 MHz
CL = 30 pF
—
17
25
mA
Notes
1. All output pins except XA[15:0]
2. XA[15:0]
3. All input pins except RESET_N
4.
RESET_N pin, with 50 k
pull-up resistance
5.
Analog input pins (AIN0 to AIN3)
6.
Analog-to-Digital Converter operation ratio is 20%
7.
VDD_IO or 0 V for input ports; no load for other pins
8.
DRAM controller blocks stopped by DRAME_N pin setting
9.
Cacheable setting and external ROM used
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