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| 型号： | MLD2N06CLT4 |
| 厂商： | ON Semiconductor |
| 文件页数： | 1/7页 |
| 文件大小： | 0K |
| 描述： | MOSFET N-CH CLAMPED 2A 62V DPAK |
| 产品变化通告： | LTB Notification 03/Jan/2008 |
| 标准包装： | 2,500 |
| 系列： | SMARTDISCRETES™ |
| 类型： | 低端 |
| 输入类型： | 非反相 |
| 输出数： | 1 |
| 导通状态电阻： | 300 毫欧 |
| 电流 - 峰值输出： | 4.4A |
| 工作温度： | -50°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-252-3，DPak（2 引线+接片），SC-63 |
| 供应商设备封装： | DPAK-3 |
| 包装： | 带卷 (TR) |
MLD2N06CL
Preferred Device
SMARTDISCRETES t MOSFET
2 Amp, 62 Volts, Logic Level
N ? Channel DPAK
The MLD2N06CL is designed for applications that require a rugged
power switching device with short circuit protection that can be
directly interfaced to a microcontrol unit (MCU). Ideal applications
include automotive fuel injector driver, incandescent lamp driver or
http://onsemi.com
other applications where a high in ? rush current or a shorted load
condition could occur.
This Logic Level Power MOSFET features current limiting for
V (BR)DSS
62 V (Clamped)
R DS(on) TYP
400 m W
I D MAX
2.0 A
short circuit protection, integrated Gate ? Source clamping for ESD
protection and integral Gate ? Drain clamping for over ? voltage
protection and SENSEFET t technology for low on ? resistance. No
additional gate series resistance is required when interfacing to the
output of a MCU, but a 40 k W gate pulldown resistor is recommended
to avoid a floating gate condition.
The internal Gate ? Source and Gate ? Drain clamps allow the device
to be applied without use of external transient suppression
components. The Gate ? Source clamp protects the MOSFET input
from electrostatic voltage stress up to 2.0 kV. The Gate ? Drain clamp
G
N ? Channel
R1
D
protects the MOSFET drain from the avalanche stress that occurs with
inductive loads. Their unique design provides voltage clamping that is
essentially independent of operating temperature.
Features
? Pb ? Free Packages are Available
R2
S
MARKING
DIAGRAM
MAXIMUM RATINGS (T J = 25 ° C unless otherwise noted)
Rating Symbol Value
Drain ? to ? Source Voltage V DSS Clamped
V DGR
Clamped
Drain ? to ? Gate Voltage (R GS = 1.0 M W )
Unit
Vdc
Vdc
1 2
3
4
CASE 369C
DPAK
STYLE 2
YWW
L2N
06CLG
Gate ? to ? Source Voltage ? Continuous
Drain Current ? Continuous @ T C = 25 ° C
Total Power Dissipation @ T C = 25 ° C
V GS
I D
P D
± 10
Self ? limited
40
Vdc
Adc
W
Y
WW
L2N06CL
G
= Year
= Work Week
= Device Code
= Pb ? Free Package
Electrostatic Voltage
Operating & Storage Temperature Range
THERMAL CHARACTERISTICS
ESD
T J , T stg
2.0
? 50 to 150
kV
° C
ORDERING INFORMATION
Device Package Shipping ?
Maximum Junction Temperature
Thermal Resistance,
Junction ? to ? Case
Junction ? to ? Ambient (Note 1)
Junction ? to ? Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8 ″ from case for 5 seconds
T J(max)
R q JC
R q JA
R q JA
T L
150
3.12
100
71.4
260
° C
° C/W
° C
MLD2N06CL
MLD2N06CLG
MLD2N06CLT4
MLD2N06CLT4G
DPAK
DPAK
(Pb ? Free)
DPAK
DPAK
(Pb ? Free)
75 Units/Rail
75 Units/Rail
2500 Tape & Reel
2500 Tape & Reel
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR ? 4 board using the minimum recommended
pad size.
2. When surface mounted to an FR ? 4 board using the 0.5 sq.in. drain pad size.
?For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
? Semiconductor Components Industries, LLC, 2009
October, 2009 ? Rev. 3
1
Publication Order Number:
MLD2N06CL/D
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