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参数资料
| 型号： | MM54HC646J |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 总线收发器 |
| 英文描述： | HC/UH SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24 |
| 封装： | DIP-24 |
| 文件页数： | 2/6页 |
| 文件大小： | 188K |
| 代理商： | MM54HC646J |
Absolute Maximum Ratings (Notes12)
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Supply Voltage (VCC)
b
05 to a70V
DC Input Voltage (VIN)
b
15 to VCCa15V
DC Output Voltage (VOUT)
b
05 to VCCa05V
Clamp Diode Current (IIK IOK)
g
20 mA
DC Output Current per pin (IOUT)
g
35 mA
DC VCC or GND Current per pin (ICC)
g
70 mA
Storage Temperature Range (TSTG)
b
65 Cto a150 C
Power Dissipation (PD)
(Note 3)
600 mW
SO Package only
500 mW
Lead Temp (TL) (Soldering 10 seconds)
260 C
Operating Conditions
Min
Max
Units
Supply Voltage (VCC)2
6
V
DC Input or Output Voltage
0
VCC
V
(VIN VOUT)
Operating Temp Range (TA)
MM74HC
b
40
a
85
C
MM54HC
b
55
a
125
C
Input Rise or Fall Times
VCCe20V
(tr tf)
1000
ns
VCCe45V
500
ns
VCCe60V
400
ns
DC Electrical Characteristics (Note 4)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
VIH
Minimum High Level
V
Input Voltage
V
VIL
Maximum Low Level
V
Input Voltage
V
VOH
Minimum High Level
VINeVIH or VIL
Output Voltage
lIOUTls mA
V
VINeVIH or VIL
lIOUTls
mA
V
lIOUTls
mA
V
VOL
Maximum Low Level
VINeVIH or VIL
Output Voltage
lIOUTls mA
V
VINeVIH or VIL
lIOUTls
mA
V
lIOUTls
mA
V
IIN
Maximum Input Current
VINeVCC or GND
V
g
m
A
IOZ
Maximum TRISTATE
VOUTeVCC or GND
V
g
m
A
Output Leakage
GeVIH
ICC
Maximum Quiescent
VINeVCC or GND
V
m
A
Supply Current
IOUTe mA
Note 1
Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2
Unless otherwise specified all voltages are referenced to ground
Note 3
Power Dissipation temperature derating
plastic ‘‘N’’ package b12 mW C from 65 Cto85 C ceramic ‘‘J’’ package b12 mW C from 100 Cto125 C
Note 4
For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HC at 45V Thus the 45V values should be used when designing
with this supply Worst case VIH and VIL occur at VCCe55V and 45V respectively (The VIH value at 55V is 385V) The worst case leakage current (IIN ICC and
IOZ) occur for CMOS at the higher voltage and so the 60V values should be used
VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89
Truth Table
Inputs
Data IO
Operation or Function
G
DIR
CAB
CBA
SAB
SBA
A1 Thru A8
B1 Thru B8
’ALS646 ’ALS647
’ALS648 ’ALS649
’AS646
’AS648
XX
u
X
Input
Not Specified
Store A B Unspecified
XX
X
u
X
Not Specified
Input
Store B A Unspecified
HX
uu
XX
Input
Store A and B Data
H
X
H or L
X
Isolation hold storage
2
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