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参数资料
| 型号： | MM74HCT14SJX |
| 厂商： | Fairchild Semiconductor |
| 文件页数： | 11/11页 |
| 文件大小： | 0K |
| 描述： | IC SCHMITT TRIGG HEX INV 14-SOP |
| 标准包装： | 2,000 |
| 系列： | 74HCT |
| 逻辑类型： | 逆变器，缓冲器 |
| 电路数： | 6 |
| 输入数： | 1 |
| 特点： | 施密特触发器 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 静态（最大值）： | 1µA |
| 输出电流高，低： | 4.8mA，4.8mA |
| 逻辑电平 - 低： | 0.5 V ~ 0.6 V |
| 逻辑电平 - 高： | 1.9 V ~ 2.1 V |
| 额定电压和最大 CL 时的最大传播延迟： | 20ns @ 5V，50pF |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 供应商设备封装： | 14-SOIC |
| 封装/外壳： | 14-SOIC（0.209"，5.30mm 宽） |
| 包装： | 带卷 (TR) |
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FMS6143A Rev. 1.0.1
9
FMS6143A
—Three-Channel
6
th
-Order
Standard-Definition
VoltagePlus
Video
Filter
Driver
Application Information
Application Circuits
The FMS6143A VoltagePlus video filter provides 6dB
gain from input to output. In addition, the input is slightly
offset to optimize the output driver performance. The
offset is held to the minimum required value to decrease
the standing DC current into the load. Typical voltage
levels are shown in Figure 11.
There is a 280mV offset from the DC input level to the
DC output level. V OUT = 2 * V IN + 280mV.
0.0 -> 0.02V
0.3 -> 0.32V
0.65 -> 0.67V
1.0 -> 1.02V
VIN
0.28V
0.88V
1.58V
2.28V
Driven by:
DC-Coupled DAC Outputs
AC-Coupled and Clamped
Y, CV, R, G, B
VOUT
0.15V
0.5V
0.85V
VIN
0.58V
1.28V
1.98V
Driven by:
AC-Coupled and Biased
U, V, Pb, Pr, C
VOUT
Figure 11. Typical Voltage Levels
The FMS6143A provides an internal diode clamp to
support AC-coupled input signals. If the input signal
does not go below ground, the input clamp does not
operate. This allows DAC outputs to directly drive the
FMS6143A without an AC coupling capacitor. When the
input is AC coupled, the diode clamp sets the sync tip
(or lowest voltage) just below ground. The worst-case
sync tip compression due to the clamp cannot exceed
7mV. The input level set by the clamp, combined with
the internal DC offset, keeps the output within its
acceptable range.
For symmetric signals like Chroma, U, V, Pb, and Pr;
the average DC bias is fairly constant and the inputs can
be AC coupled with the addition of a pull-up resistor to
set the DC input voltage. DAC outputs can also drive
these same signals without the AC-coupling capacitor. A
conceptual illustration of the input clamp circuit is shown
in Figure 12.
YOUT
Video Cables
75
Driver
YIN
LOAD1
LOAD2
(optional)
0.65V
Figure 12. Input Clamp Circuit
I/O Configurations
For a DC-coupled DAC drive with DC-coupled outputs,
use this configuration:
DVD or
STB
SoC
DAC
Output
75W
LCVF
Clamp
Inactive
0V - 1.4V
Figure 13. DC-Coupled Inputs and Outputs
Alternatively, if the DAC’s average DC output level causes
the signal to exceed the range of 0V to 1.4V, it can be
AC coupled as:
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Active
0.1μ
0V - 1.4V
75
Figure 14. AC-Coupled Inputs, DC-Coupled Outputs
When the FMS6143A is driven by an unknown external
source or a SCART switch with its own clamping circuitry,
the inputs should be AC coupled as shown in Figure 15.
75
LCVF
Clamp
Active
0.1μ
External video
source must
be AC coupled
0V - 1.4V
75
Figure 15. SCART with DC-Coupled Outputs
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