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VII - 71
Chapter 7
16-bit Timers
Cascade Connection
(5)
Set the TM7BCR flag of the TM7MD2 register
to "1" to select the TM7OC1 compare match
as a clear source of binary counter.
Also, set the T7PWMSL flag to "1" to select the
TM7OC2 compare match as a duty of PWM
output.
(6)
Select fosc as a clock source by the
TM7CK1-0 flag of the TM7MD1 register.
Also, select 1/1 dividing as a count clock
source by the TM7PS1-0 flag.
(7)
Set the PWM output cycle to the timer 7 preset
register 1 (TM7PR1), the timer 8 preset
register 1 (TM8PR1). To set 1/60 Hz by
dividing 8 MHz, set as;
480,000,000 - 1 = 479,999,999
(x'1C9C37FF')
At the same time, the same values as the
preset registers are loaded to the timer 7
compare register 1 (TM7OC1) and timer 8
compare register 1 (TM8OC1), and the timer 7
binary counter (TM7BC) and timer 8 binary
counter (TM8BC) are initialized to x'0000'.
(8)
Set the "H" period of the PWM output to the
timer 7 preset register 2 (TM7PR2) and timer 8
preset register 2 (TM8PR2). To set 1/10 duty
of 480,000,000 dividing, set as;
480,000,000 / 10 = 48,000,000
(x'02DC6C00')
At the same time, the same values as the pre
set registers are loaded to the timer 7 compare
register 2 (TM7OC2) and the timer 8 compare
register 2 (TM8OC2).
(9)
Set the TM7EN flag of the TM7MD1 register to
"1" to operate timer 7 and timer 8.
Setup Procedure
(5)
Set the high precision PWM output
operation.
TM7MD2 (x'3F79')
bp5
: TM7BCR
= 1
bp6
: T7PWMSL = 1
(6)
Select the count clock source.
TM7MD1 (x'3F78')
bp1-0
: TM7CK1-0 = 00
bp3-2
: TM7PS1-0 = 00
(7)
Set the PWM output cycle.
TM7PR1(x'3F75',x'3F74')= x'37FF'
TM8PR1(x'3F85',x'3F84')= x'1C9C'
(8)
Set the "H" period of the PWM
output.
TM7PR2 (x'3F7D',x'3F7C')=x'6C00'
TM8PR2 (x'3F8D',x'3F8C')=x'02DC'
(9)
Start the timer operation.
TM7MD1 (x'3F78')
bp4
: TM7EN
= 1
Description