- 您现在的位置：买卖IC网 > PDF目录15742 > MPC5534EVBISYS (Freescale Semiconductor)KIT EVAL ISYSTEMS MPC5534 PDF资料下载
参数资料
| 型号： | MPC5534EVBISYS |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 54/60页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL ISYSTEMS MPC5534 |
| 标准包装： | 1 |
| 类型： | 微控制器 |
| 适用于相关产品： | MPC5534 |
| 所含物品： | 评估板和演示软件 |
| 相关产品： | MPC5554MZP132R2-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MZP132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MVR132R2-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554MVR132-ND - IC MCU 2M FLASH 132MHZ 416-PBGA MPC5554AZP132-ND - IC MPU 2M FLASH 132MHZ 416-PBGA |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页当前第54页第55页第56页第57页第58页第59页第60页
MPC5534 Microcontroller Data Sheet, Rev. 6
Revision History for the MPC5534 Data Sheet
Freescale Semiconductor
58
Table 25, eMIOS Timing:
Deleted (MTS) from the heading, table, and footnotes.
Footnote 1: Changed ‘VDDEH = 3.0–5.5;’ to ‘VDDEH = 3.0–5.25;’
Footnote 1: Deleted ‘FSYS = 80 MHz,’ ‘VDD = 1.35–1.65 V’, ‘VDD33 and VDDSYN = 3.0–3.6 V’ and
‘and CL = 200 pF with SRC = 0b11.’
Added Footnote 2: ‘This specification does not include the rise and fall times. When calculating the minimum
eMIOS pulse width, include the rise and fall times defined in the slew rate control fields (SRC) of the pad
configuration registers (PCR).’
Figure 17, eMIOS Timing: Added figure.
Table 26, DSPI Timing:
Table Title: Added footnote that reads: Speed is the nominal maximum frequency. Max speed is the maximum
speed allowed including frequency modulation (FM). 42 MHz parts allow for 40 MHz system clock + 2% FM;
68 MHz parts allow for 66 MHz system clock + 2% FM, and 82 MHz parts allow for 80 MHz system clock + 2% FM.
Spec1:SCK Cycle Time: changes to values: 40 MHz, min. = 48.8 ns, max = 5.8 ms; 66 MHz, min. = 28.4 ns,
max = 3.5 ms; 80 MHz min. = 24.4 ns, max = 2.9 ms.
Spec 2: PCS to SCK delay: 40 MHz, min. = 46 ns; 66 MHz, min. = 26 ns; 80 MHz min. = 22 ns.
Spec 3: After SCK delay: 40 MHz, min. = 45 ns; 66 MHz, min. = 25 ns; 80 MHz min. = 21 ns.
Spec 9: Data setup time for inputs, Master (MTFE = 1, CPHA = 0): 66 MHz, min. = 6 ns; 80 MHz min. = 8 ns.
Spec 10: Data hold time for inputs, Master (MTFE = 1, CPHA = 0): 40 MHz, min. = 45 ns; 66 MHz, min. = 25 ns;
80 MHz min. = 21 ns.
Spec 11: Data valid (after SCK edge), Master (MTFE = 1, CPHA = 0): 40 MHz, max. = 45 ns;
66 MHz, max. = 25 ns; 80 MHz max. = 21 ns.
Footnote 1: Changed ‘VDDEH = 3.0–5.5;’ to ‘VDDEH = 3.0–5.25;’
Footnote 1: Added to beginning of footnote 1 ‘All DSPI timing specifications use the fastest slew rate (SRC =
0b11) on pad type M or MH. DSPI signals using pad types of S or SH have an additional delay based on the slew
rate.’
Footnote 1: Deleted ‘VDD = 1.35–1.65 V’ and ‘VDD33 and VDDSYN = 3.0–3.6 V.
Table 27, EQADC SSI Timing Characteristics:
Footnote 1: Changed ‘VDDEH = 3.0–5.5;’ to ‘VDDEH = 3.0–5.25;’
Deleted from table title ‘(Pads at 3.3 V or 5.0 V)’
Deleted 1st line in table ‘CLOAD = 25 pF on all outputs. Pad drive strength set to maximum.’
Spec 1: FCK frequency -- removed.
Combined footnotes 1 and 2, and moved the new footnote to Spec 2. Moved old footnote 3 that is now
footnote 2 to Spec 2.
Footnote 1, deleted ‘VDD = 1.35–1.65 V’ and ‘VDD33 and VDDSYN = 3.0–3.6V.’
Changed ‘CL = 50 pF’ to ‘CL = 25 pF.’
Footnote 2: added ‘cycle’ after ‘duty’ to read: FCK duty cycle is not 50% when . . . .
Figure 28, MPC5534 208 Package and Figure 29 MPC5534 324 Package: Deleted the version number and date.
Figure 30, MPC5534 208 Package Dimensions and Figure 31 MPC5534 324 Package Dimensions:
Deleted the version number and date.
Table 30. Table and Figure Changes Between Rev. 3.0 and 4.0 (continued)
Location
Description of Changes
相关PDF资料 |
PDF描述 |
|---|---|
| V300C36E75BL2 | CONVERTER MOD DC/DC 36V 75W |
| MAX6440UTLSTD3+T | IC BATTERY MON SNGL SOT23-6 |
| AFK477M06F24T-F | CAP ALUM 470UF 6.3V 20% SMD |
| GBC13DRYI-S734 | CONN EDGECARD 26POS DIP .100 SLD |
| GBC17DRXS-S734 | CONN EDGECARD 34POS DIP .100 SLD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC5534MVF40 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5534MVF40R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5534MVF66 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5534MVF66R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5534MVF80 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
发布紧急采购，3分钟左右您将得到回复。