- 您现在的位置：买卖IC网 > PDF目录80528 > MPC5566MVR144 (FREESCALE SEMICONDUCTOR INC) 32-BIT, FLASH, 114 MHz, MICROCONTROLLER, PBGA416 PDF资料下载
参数资料
| 型号： | MPC5566MVR144 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 114 MHz, MICROCONTROLLER, PBGA416 |
| 封装： | 27 X 27 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAL-1, BGA-416 |
| 文件页数： | 59/66页 |
| 文件大小： | 1351K |
| 代理商： | MPC5566MVR144 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页当前第59页第60页第61页第62页第63页第64页第65页第66页
MPC5566 Microcontroller Data Sheet, Rev. 2.0
Revision History for the MPC5566 Data Sheet
Freescale Semiconductor
62
Table 22, Bus Operation Timing:
Added a column to the table for 72 MHz minimum and maximum bus frequencies.
Spec 1: 72 MHz Min. column = 13.3.
Specs 5 and 6: CLKOUT positive edge to output signals invalid of high: Corrected format to show the bus timing
values for various frequencies with EBTS bit = 0 and EBTS bit = 1.
Specs 5, and 6: Added the BB signal for arbitration. Added the following calibration signals: CAL_ADDR[9:30],
CAL_CS[0:3], CAL_DATA[0:15], CAL_OE, CAL_RD_WR, CAL_TS, CAL_WE/BE[0:1].
Spec 5: EBI and Calibration sections, 72 MHz Min column, EBTS = 0 is 1.0, EBTS = 1 is 1.5.
Spec 6: EBI section, 72 MHz Max column, EBTS = 0 is 5.0, EBTS = 1 is 6.0.
Spec 6a: Calibration section, 72 MHz Max column, EBTS = 0 is 6.0, EBTS = 1 is 7.0
Specs 7 and 8: Added the BB signal for arbitration. Added the following calibration signals: CAL_ADDR[9:30],
CAL_DATA[0:15], CAL_RD_WR, CAL_TS.
Table 23, External Interrupt Timing:
Footnote 1: Deleted ‘. . FSYS = 132 MHz’, ‘VDD33 and VDDSYN = 3.0–3.6 V’ and ‘ .and CL = 200 pF with SRC =
0b11.’
Deleted second figure after table ‘External Interrupt Setup Timing.’
Table 24, eTPU Timing
Footnote 1: Deleted ‘. . .FSYS = 132 MHz’, ‘VDD33 and VDDSYN = 3.0–3.6 V’ and ‘and CL = 200 pF with
SRC = 0b11.’
Deleted second figure, ‘eTPU Input/Output Timing’ after this table.
Added Footnote 2: ‘This specification does not include the rise and fall times. When calculating the minimum
eTPU pulse width, include the rise and fall times defined in the slew rate control fields (SRC) of the pad
configuration registers (PCR).’
Table 25, eMIOS Timing:
Deleted (MTS) from the heading, table, and footnotes.
Footnote 1: Deleted ‘. . .FSYS = 132 MHz, ‘VDD33 and VDDSYN = 3.0–3.6 V’ and ‘and CL = 200 pF with
SRC = 0b11.’
Added Footnote 2: ‘This specification does not include the rise and fall times. When calculating the minimum
eMIOS pulse width, include the rise and fall times defined in the slew rate control fields (SRC) of the pad
configuration registers (PCR).’
Figure 17, eMIOS Timing: Added figure.
Table 26, DSPI Timing:
Added 144 MHz column to the table.
Spec1:SCK Cycle Time: changes to values: 80 MHz, min. = 24.4; 112 MHz, min. = 17.5, max = 2.1;
132 MHz, min. = 14.8, max = 1.8; 144 MHz, min. = 13.6, max = 1.6.
Spec1:SCK Cycle Time: Added footnote 4 to the 144 MHz min. and max values that reads: Preliminary.
Specification pending final characterization
Spec 2, PCS to SCK delay, 144 MHz, min. TBD
Spec 3, After SCK delay, 144 MHz, min. TBD
Spec 9, Master (MTFE = 1, CPHA = 0), 144 MHz, min. TBD
Spec 10, Master (MTFE = 1, CPHA = 0), 144 MHz, min. TBD
Spec 11, Master (MTFE = 1, CPHA = 0), 144 MHz, max TBD
Spec 12, Master (MTFE = 1, CPHA = 0), 144 MHz, min. TBD
Added to beginning of footnote 1 ‘All DSPI timing specifications use the fastest slew rate (SRC = 0b11) on pad
type M or MH. DSPI signals using pad types of S or SH have an additional delay based on the slew rate.’
Footnote 1: Deleted ‘VDD = 1.35–1.65 V’ and ‘VDD33 and VDDSYN = 3.0–3.6 V.
Table 33. Table and Figure Changes Between Rev. 0.0 and Rev. 1.0 (continued)
Location
Description of Changes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
相关PDF资料 |
PDF描述 |
|---|---|
| MCF54453CVR200 | 32-BIT, 200 MHz, RISC PROCESSOR, PBGA360 |
| MC9S12XF128J0MLMR | MICROCONTROLLER, PQFP112 |
| MPC8555ECVTAKD | RISC PROCESSOR, PBGA783 |
| MPC8572CPXAUNB | 32-BIT, 1333 MHz, MICROPROCESSOR, PBGA1023 |
| MPC8572CVTATNB | 32-BIT, 1200 MHz, MICROPROCESSOR, PBGA1023 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC5566MZP132 | 功能描述:32位微控制器 - MCU 3M FLASH,32K CACHE 128K RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MPC5566MZP132R | 制造商:Freescale Semiconductor 功能描述:32-BIT MPC55XX POWERPC RISC 3MB FLASH 1.8V/2.5V/3.3V/5V 416 - Tape and Reel |
| MPC5566MZP144 | 功能描述:32位微控制器 - MCU 3M FLASH32K CACHE 128K RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MPC5567 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5567EVB | 功能描述:BOARD EVALUATION MPC5567MZP132 RoHS:否 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
发布紧急采购，3分钟左右您将得到回复。