参数资料
型号: MPC7410RX500LX
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 500 MHz, RISC PROCESSOR, CBGA360
封装: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件页数: 19/44页
文件大小: 885K
代理商: MPC7410RX500LX
26
MPC7410 RISC Microprocessor Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Pinout Listings
Notes:
1. OVdd supplies power to the processor bus, JTAG, and all control signals except the L2 cache controls (L2CE,
L2WE, and L2ZZ); L2OVDD supplies power to the L2 cache interface (L2ADDR[0:18], L2DATA[0:63], L2DP[0:7],
and L2SYNC-OUT) and the L2 control signals; and Vdd supplies power to the processor core and the PLL and DLL
(after filtering to become AVDD and L2AVDD, respectively). These columns serve as a reference for the nominal
voltage supported on a given signal as selected by the BVSEL/L2VSEL pin configurations of Table 2 and the
voltage supplied. For actual recommended value of Vin or supply voltages, see Table 3.
2. These are test signals for factory use only and must be pulled up to OVdd for normal machine operation.
3. To allow for future I/O voltage changes, provide the option to connect BVSEL and L2VSEL independently to either
OVDD (selects 2.5 V), GND (selects 1.8 V), or to HRESET (selects 2.5 V). For the MPC7410 both the L2 bus and
the processor bus only support the 2.5 V and 1.8 V options. The default selection if BVSEL and/or L2VSEL is left
unconnected is 2.5 V operation.
4. Connect to HRESET to trigger post power-on-reset (por) internal memory test.
5. Ignored in 60x bus mode.
6. Unused output in 60x bus mode.
QACK
B2
Low
Input
BVSEL
QREQ
J3
Low
Output
BVSEL
RSRV
D3
Low
Output
BVSEL
SHD0
B3
Low
I/O
BVSEL
8
SHD1
B4
Low
I/O
BVSEL
5, 8
SMI
A12
Low
Input
BVSEL
SRESET
E10
Low
Input
BVSEL
SYSCLK
H9
Input
BVSEL
TA
F1
Low
Input
BVSEL
TBEN
A2
High
Input
BVSEL
TBST
A11
Low
Output
BVSEL
TCK
B10
High
Input
BVSEL
TDI
B7
High
Input
BVSEL
9
TDO
D9
High
Output
BVSEL
TEA
J1
Low
Input
BVSEL
TMS
C8
High
Input
BVSEL
9
TRST
A10
Low
Input
BVSEL
9, 14
TS
K7
Low
I/O
BVSEL
TSIZ[0:2]
A9, B9, C9
High
Output
BVSEL
TT[0:4]
C10, D11, B12, C12, F11
High
I/O
BVSEL
WT
C3
Low
I/O
BVSEL
VDD
G8, G10, G12, J8, J10, J12, L8, L10, L12, N8,
N10, N12
——
N/A
Table 13. Pinout Listing for the MPC7410, 360 CBGA Package (Continued)
Signal Name
Pin Number
Active
I/O
I/F
Select1
Notes
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