- 您现在的位置：买卖IC网 > PDF目录4045 > MPC8265AZUPIBC (Freescale Semiconductor)IC MPU POWERQUICC II 480-TBGA PDF资料下载
参数资料
| 型号： | MPC8265AZUPIBC |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 23/50页 |
| 文件大小： | 0K |
| 描述： | IC MPU POWERQUICC II 480-TBGA |
| 标准包装： | 21 |
| 系列： | MPC82xx |
| 处理器类型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 300MHz |
| 电压： | 2V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 480-LBGA |
| 供应商设备封装： | 408-TBGA（37.5x37.5） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页当前第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页
MPC8260A PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Freescale Semiconductor
3
Features
— PowerPC architecture-compliant memory management unit (MMU)
— Common on-chip processor (COP) test interface
— High-performance (6.6–7.65 SPEC95 benchmark at 300 MHz; 1.68 MIPs/MHz without
inlining and 1.90 Dhrystones MIPS/MHz with
— Supports bus snooping for data cache coherency
— Floating-point unit (FPU)
Separate power supply for internal logic and for I/O
Separate PLLs for G2 core and for the CPM
— G2 core and CPM can run at different frequencies for power/performance optimization
— Internal core/bus clock multiplier that provides 1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios
— Internal CPM/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ratios
64-bit data and 32-bit address 60x bus
— Bus supports multiple master designs
— Supports single- and four-beat burst transfers
— 64-, 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller
— Supports data parity or ECC and address parity
32-bit data and 18-bit address local bus
— Single-master bus, supports external slaves
— Eight-beat burst transfers
— 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller
60x-to-PCI bridge (MPC8265 and MPC8266 only)
— Programmable host bridge and agent
— 32-bit data bus, 66 MHz, 3.3 V
— Synchronous and asynchronous 60x and PCI clock modes
— All internal address space available to external PCI host
— DMA for memory block transfers
— PCI-to-60x address remapping
System interface unit (SIU)
— Clock synthesizer
— Reset controller
— Real-time clock (RTC) register
— Periodic interrupt timer
— Hardware bus monitor and software watchdog timer
— IEEE Std. 1149.1 standard JTAG test access port
Twelve-bank memory controller
— Glueless interface to SRAM, page mode SDRAM, DRAM, EPROM, Flash and other user-
definable peripherals
— Byte write enables and selectable parity generation
相关PDF资料 |
PDF描述 |
|---|---|
| IDT70V25L20PFGI8 | IC SRAM 128KBIT 20NS 100TQFP |
| MPC8265ACZUMHBC | IC MPU POWERQUICC II 480-TBGA |
| MPC755CRX350TE | MCU HIP4DP 350MHZ 360-CBGA |
| AMM43DRAI | CONN EDGECARD 86POS .156 R/A |
| MPC755BRX350TE | MCU HIP4DP 350MHZ 360-CBGA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8265AZUPJDB | 制造商:Motorola Inc 功能描述:Ic, Microprocessor, 32-bit, Cmos, Bga, 480pin, Plastic |
| MPC8265AZUPJDC | 功能描述:微处理器 - MPU POWER QUICC II HIP4C RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8265CVR | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:MPC826xA (HiP4) Family Hardware Specifications |
| MPC8265CZU | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:MPC826xA (HiP4) Family Hardware Specifications |
| MPC8265VR | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:MPC826xA (HiP4) Family Hardware Specifications |
发布紧急采购，3分钟左右您将得到回复。