参数资料
型号: MPC8306VMACDCA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 200 MHz, RISC PROCESSOR, PBGA369
封装: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件页数: 64/76页
文件大小: 474K
代理商: MPC8306VMACDCA
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Freescale Semiconductor
67
Thermal
23 Thermal
This section describes the thermal specifications of the MPC8306.
23.1
Thermal Characteristics
Table 61 provides the package thermal characteristics for the 369, 19
19 mm MAPBGA of the
MPC8306.
23.1.1
Thermal Management Information
For the following sections, PD =(VDD IDD)+PI/O, where PI/O is the power dissipation of the I/O
drivers.
23.1.2
Estimation of Junction Temperature with Junction-to-Ambient
Thermal Resistance
An estimation of the chip junction temperature, TJ, can be obtained from the equation:
TJ =TA +(R
JA PD)
Eqn. 1
where:
TJ = junction temperature (C)
Table 61. Package Thermal Characteristics for MAPBGA
Characteristic
Board type
Symbol
Value
Unit
Notes
Junction-to-ambient natural convection
Single-layer board (1s)
RJA
39
°C/W
1, 2
Junction-to-ambient natural convection
Four-layer board (2s2p)
RJA
24
°C/W
1, 2 ,3
Junction-to-ambient (@200 ft/min)
Single-layer board (1s)
RJMA
32
°C/W
1, 3
Junction-to-ambient (@200 ft/min)
Four-layer board (2s2p)
RJMA
21
°C/W
1, 3
Junction-to-board
RJB
14
°C/W
4
Junction-to-case
RJC
9°C/W
5
Junction-to-package top
Natural convection
JT
2°C/W
6
Notes:
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.
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