参数资料
型号: MPC8308VMAFDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: RISC MICROCONTROLLER, PBGA473
封装: 19 X 19 MM, 1.39 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, PLASTIC, MABGA-473
文件页数: 23/90页
文件大小: 1123K
代理商: MPC8308VMAFDA
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Freescale Semiconductor
3
Electrical Characteristics
2.1.2
Power Supply Voltage Specification
Table 2 provides the recommended operating conditions for the device. Note that the values in Table 2 are
the recommended and tested operating conditions. Proper device operation outside of these conditions is
not guaranteed.
SERDES PHY
XCOREVDD,
XPADVDD,
SDAVDD
–0.3 to 1.26
V
eTSEC I/O Voltage
LVDD1, LVDD2
–0.3 to 2.75 or
–0.3 to 3.6
V6,8
Input voltage
DDR2 DRAM signals
MVIN
–0.3 to (GVDD + 0.3)
V
2, 5
DDR2 DRAM reference
MVREF
–0.3 to (GVDD + 0.3)
V
2, 5
eTSEC
LVIN
–0.3 to (LVDD + 0.3)
V
4, 5,8
Local bus, DUART, system control and power
management, eSDHC, I2C, Interrupt,
Ethernet management, SPI, Miscellaneous
and JTAG I/O voltage
OVIN
–0.3 to (NVDD + 0.3)
V
3, 5,7
Storage temperature range
TSTG
–55 to 150
°C—
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
3. Caution: OVIN must not exceed NVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during
power-on reset and power-down sequences.
4. Caution: LVIN must not exceed LVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during power-on
reset and power-down sequences.
5. (M, L, O)VIN and MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 2
6. The max value of supply voltage should be selected based on the RGMII mode. The lower range applies to RGMII mode.
7. NVDD here refers to NVDDA, NVDDB,NVDDG, NVDDH, NVDDJ, NVDDP_K from the ball map.
8. LVDD1 here refers to NVDDC and LVDD2 refers to NVDDF from the ball map
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended Value1
Unit
SerDes internal digital power
XCOREVDD
1.0 V ± 50 mV
V
SerDes internal digital power
XCOREVSS
0.0
V
SerDes I/O digital power
XPADVDD
1.0 V ± 50 mV
V
SerDes analog power for PLL
SDAVDD
1.0 V ± 50 mV
V
SerDes analog power for PLL
SDAVSS
0V
SerDes I/O digital power
XPADVSS
0V
Table 1. Absolute Maximum Ratings1 (continued)
Characteristic
Symbol
Max Value
Unit
Notes
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