参数资料
型号: MPC8314ECVRADDA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: MICROPROCESSOR, PBGA620
封装: 29 X 29 MM, LEAD FREE, PLASTIC, TEPBGA-620
文件页数: 65/106页
文件大小: 1253K
代理商: MPC8314ECVRADDA
MPC8314E PowerQUICC II Pro Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
61
PCI Express
16.2
AC Requirements for PCI Express SerDes Clocks
Table 53 lists the PCI Express SerDes clock AC requirements.
16.3
Clocking Dependencies
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.
16.4
Physical Layer Specifications
Following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer please use the PCI Express
Base Specification, Rev. 1.0a.
16.4.1
Differential Transmitter (TX) Output
Table 54 defines the specifications for the differential output at all transmitters (TXs). The parameters are
specified at the component pins.
Table 53. SD_REF_CLK and SD_REF_CLK AC Requirements
Symbol
Parameter Description
Min
Typ
Max
Units
Notes
tREF
REFCLK cycle time
10
ns
tREFCJ
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles.
——
100
ps
tREFPJ
Phase jitter. Deviation in edge location with respect to mean edge
location.
–50
50
ps
Table 54. Differential Transmitter (TX) Output Specifications
Parameter
Symbol
Comments
Min
Typical
Max
Units
Notes
Unit interval
UI
Each UI is 400 ps ± 300 ppm.
UI does not account for
Spread Spectrum Clock
dictated variations.
399.88
400
400.12
ps
1
Differential peak-to-peak
output voltage
VTX-DIFFp-p
VTX-DIFFp-p = 2*|VTX-D+ -
VTX-D-|
0.8
1.2
V
2
De-Emphasized
differential output voltage
(ratio)
VTX-DE-RATIO
Ratio of the VTX-DIFFp-p of the
second and following bits after
a transition divided by the
VTX-DIFFp-p of the first bit after
a transition.
–3.0
–3.5
-4.0
dB
2
Minimum TX eye width
TTX-EYE
The maximum Transmitter
jitter can be derived as
TTX-MAX-JITTER = 1 - UTX-EYE=
0.3 UI.
0.70
——UI
2, 3
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