参数资料
型号: MPC8378ECVRAGD
厂商: Freescale Semiconductor
文件页数: 105/128页
文件大小: 0K
描述: MPU POWERQUICC II PRO 689-PBGA
标准包装: 27
系列: MPC83xx
处理器类型: 32-位 MPC83xx PowerQUICC II Pro
速度: 400MHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 689-BBGA 裸露焊盘
供应商设备封装: 689-TEPBGA II(31x31)
包装: 托盘
MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
78
Freescale Semiconductor
This figure provides the AC test load for the SPI.
Figure 51. SPI AC Test Load
These figures represent the AC timing from Table 66. Note that although the specifications generally
reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge is the
active edge.
This figure shows the SPI timing in slave mode (external clock).
Figure 52. SPI AC Timing in Slave Mode (External Clock) Diagram
SPI inputs—Slave mode (external clock) input hold time
tNEIXKH
2—
ns
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tNIKHOV symbolizes the internal
timing (NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).
2. Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings
are measured at the pin. The maximum SPICLK input frequency is 66.666 MHz.
Table 66. SPI AC Timing Specifications (continued)
Parameter
Symbol1
Min
Max
Unit
Output
Z0 = 50 Ω
OVDD/2
RL = 50 Ω
SPICLK (input)
tNEIXKH
tNEIVKH
tNEKHOV
Input Signals:
SPIMOSI
(See Note)
Output Signals:
SPIMISO
(See Note)
Note: The clock edge is selectable on SPI.
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