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参数资料
型号： MPC8548VUAVJA
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 1500 MHz, MICROPROCESSOR, CBGA783
封装： 29 X 29 MM, 1 MM PITCH, FLIP CHIP, LEAD FREE, CERAMIC, BGA-783
文件页数： 114/142页
文件大小： 1504K
代理商： MPC8548VUAVJA
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
73
PCI Express
TRX-EYE
Minimum
receiver eye
width
0.4
—
UI
The maximum interconnect media and transmitter
jitter that can be tolerated by the receiver can be
derived as TRX-MAX-JITTER =1 – TRX-EYE = 0.6 UI.
See Notes 2 and 3.
TRX-EYE-MEDIAN-to-
MAX-JITTER
Maximum time
between the
jitter median and
maximum
deviation from
the median
—
0.3
UI
Jitter is defined as the measurement variation of
the crossing points (VRX-DIFFp-p = 0 V) in relation
to a recovered TX UI. A recovered TX UI is
calculated over 3500 consecutive unit intervals of
sample data. Jitter is measured using all edges of
the 250 consecutive UI in the center of the
3500 UI used for calculating the TX UI.
See Notes 2, 3, and 7.
VRX-CM-ACp
AC peak
common mode
input voltage
——
150
mV
VRX-CM-ACp = |VRXD+ – VRXD-|/2 + VRX-CM-DC
VRX-CM-DC = DC(avg) of |VRX-D+ + VRX-D–|/2.
See Note 2.
RLRX-DIFF
Differential
return loss
15
—
dB
Measured over 50 MHz to 1.25 GHz with the D+
and D– lines biased at +300 mV and –300 mV,
respectively. See Note 4.
RLRX-CM
Common mode
return loss
6
—
dB
Measured over 50 MHz to 1.25 GHz with the D+
and D– lines biased at 0 V. See Note 4.
ZRX-DIFF-DC
DC differential
input impedance
80
100
120
Ω
RX DC differential mode impedance. See Note 5.
ZRX-DC
DC input
impedance
40
50
60
Ω
Required RX D+ as well as D– DC impedance
(50 ± 20% tolerance). See Notes 2 and 5.
ZRX-HIGH-IMP-DC
Powered down
DC input
impedance
200 k
—
Ω
Required RX D+ as well as D– DC impedance
when the receiver terminations do not have
power. See Note 6.
VRX-IDLE-DET-DIFFp-p
Electrical idle
detect threshold
65
—
175
mV
VRX-IDLE-DET-DIFFp-p = 2*|VRX-D+ -VRX-D–|.
Measured at the package pins of the receiver
TRX-IDLE-DET-DIFF-
ENTERTIME
Unexpected
electrical idle
enter detect
threshold
integration time
—
10
ms
An unexpected electrical idle (VRX-DIFFp-p <
VRX-IDLE-DET-DIFFp-p) must be recognized no
longer than TRX-IDLE-DET-DIFF-ENTERING to signal
an unexpected idle condition.
Table 53. Differential Receiver (RX) Input Specifications (continued)
Symbol
Parameter
Min
Nom
Max
Unit
Comments
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