参数资料
型号: MPC8569VTAQLJB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 1 MM PITCH, PLASTIC, BGA-783
文件页数: 25/126页
文件大小: 2847K
代理商: MPC8569VTAQLJB
MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 0
Package Parameters for the MPC8569E
Freescale Semiconductor
120
The following figure depicts the primary heat transfer path for a package with an attached heat sink mounted to a printed-circuit
board.
Figure 74. Package with Heat Sink Mounted to a Printed-Circuit Board
The heat sink removes most of the heat from the device. Heat generated on the active side of the chip is conducted through the
silicon and the heat sink attach material (or thermal interface material), and to the heat sink. The junction-to-case thermal
resistance is low enough that the heat sink attach material and heat sink thermal resistance are the dominant terms.
3.3.2
Thermal Interface Materials
A thermal interface material is required at the package-to-heat sink interface to minimize the thermal contact resistance. The
performance of thermal interface materials improves with increased contact pressure; this performance characteristic chart is
generally provided by the thermal interface vendor. The recommended method of mounting heat sinks on the package is by
means of a spring clip attachment to the printed-circuit board (see Figure 73).
The system board designer can choose among several types of commercially-available thermal interface materials.
4
Package Description
The following section describes the detailed content and mechanical description of the package.
4.1
Package Parameters for the MPC8569E
The following table provides the package parameters for the FC-PBGA. The package type is 29 mm
× 29 mm, 783 plastic ball
grid array (FC-PBGA).
Table 82. Package Parameters
Parameter
PBGA
Package outline
29 mm
× 29 mm
External Resistance
Internal Resistance
Radiation
Convection
Radiation
Convection
Heat Sink
Printed-Circuit Board
Thermal Interface Material
Package/Leads
Die Junction
Die/Package
(Note the internal versus external package resistance.)
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