- 您现在的位置：买卖IC网 > PDF目录2099 > MPC92429EI (IDT, Integrated Device Technology Inc)IC SYNTHESIZER LVPECL 28-PLCC PDF资料下载
参数资料
| 型号： | MPC92429EI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 7/13页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER LVPECL 28-PLCC |
| 标准包装： | 37 |
| 类型： | 时钟/频率合成器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-LCC（J 形引线） |
| 供应商设备封装： | 28-PLCC（11.5x11.5） |
| 包装： | 管件 |
MPC92429 REVISION 3 DECEMBER 14, 2012
3
2012 Integrated Device Technology, Inc.
MPC92429 Data Sheet
400 MHz Low Voltage PECL Clock Synthesizer
Table 1. Pin Configurations
Pin
I/O
Default
Type
Function
XTAL_IN, XTAL_OUT
Analog
Crystal oscillator interface.
FOUT, FOUT
Output
LVPECL
Differential clock output.
TEST
Output
LVCMOS
Test and device diagnosis output.
S_LOAD
Input
0
LVCMOS
Serial configuration control input.
This inputs controls the loading of the configuration latches with the contents of the
shift register. The latches will be transparent when this signal is high, thus the data
must be stable on the high-to-low transition.
P_LOAD
Input
1
LVCMOS
Parallel configuration control input.
This input controls the loading of the configuration latches with the content of the
parallel inputs (M and N). The latches will be transparent when this signal is low,
thus the parallel data must be stable on the low-to-high transition of P_LOAD.
P_LOAD is state sensitive.
S_DATA
Input
0
LVCMOS
Serial configuration data input.
S_CLOCK
Input
0
LVCMOS
Serial configuration clock input.
M[0:8]
Input
1
LVCMOS
Parallel configuration for PLL feedback divider (M).
M is sampled on the low-to-high transition of P_LOAD.
N[1:0]
Input
1
LVCMOS
Parallel configuration for Post-PLL divider (N).
N is sampled on the low-to-high transition of P_LOAD.
OE
Input
1
LVCMOS
Output enable (active high).
The output enable is synchronous to the output clock to eliminate the possibility
of runt pulses on the FOUT output. OE = L low stops FOUT in the logic low state
(FOUT = L, FOUT = H).
GND
Supply
Ground
Negative power supply (GND).
VCC
Supply
VCC
Positive power supply for I/O and core. All VCC pins must be connected to the
positive power supply for correct operation.
VCC_PLL
Supply
VCC
PLL positive power supply (analog power supply).
Table 2. Output Frequency Range and PLL Post-Divider N
N
Output Division
Output Frequency Range
10
0
1
200 – 400 MHz
0
1
2
100 – 200 MHz
1
0
4
50 – 100 MHz
1
8
25 – 50 MHz
相关PDF资料 |
PDF描述 |
|---|---|
| MPC92469AC | IC SYNTHESIZER LVPECL 32-LQFP |
| MPC9315AC | IC PLL CLOCK GEN/DRIVER 32-LQFP |
| MPC9350AC | IC PLL CLOCK DRIVER LV 32-LQFP |
| MPC941AE | IC CLOCK BUFFER MUX 1:27 48-LQFP |
| MPC9443FAR2 | IC CLK BUFF DVDR MUX 3:16 48LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC92429EIR2 | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MPC92429FA | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:400 MHz Low Voltage PECL Clock Synthesizer |
| MPC92429FN | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:400 MHz Low Voltage PECL Clock Synthesizer |
| MPC92432 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:1360 MHz Dual Output LVPECL Clock Synthesizer |
| MPC92432AE | 功能描述:时钟合成器/抖动清除器 FSL 1360MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
发布紧急采购，3分钟左右您将得到回复。