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参数资料
| 型号： | MPC92430FN |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 800 MHz, OTHER CLOCK GENERATOR, PQCC28 |
| 封装： | PLASTIC, LCC-28 |
| 文件页数： | 3/9页 |
| 文件大小： | 165K |
| 代理商： | MPC92430FN |
MPC92430
420
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
Table 1. Pin Configurations
Pin
I/O
Default
Type
Function
XTAL_IN, XTAL_OUT
Analog
Crystal oscillator interface
FREF_EXT
Input
0
LVCMOS
Alternative PLL reference input
FOUT, FOUT
Output
LVPECL
Differential clock output
TEST
Output
LVCMOS
Test and device diagnosis output
XTAL_SEL
Input
1
LVCMOS
PLL reference select input
S_LOAD
Input
0
LVCMOS
Serial configuration control input.
This input controls the loading of the configuration latches with the contents of the shift
register. The latches will be transparent when this signal is high, thus the data must
be stable on the high-to-low transition.
P_LOAD
Input
1
LVCMOS
Parallel configuration control input.
This input controls the loading of the configuration latches with the content of the
parallel inputs (M and N). The latches will be transparent when this signal is low, thus
the parallel data must be stable on the low-to-high transition of P_LOAD. P_LOAD is
state sensitive
S_DATA
Input
0
LVCMOS
Serial configuration data input.
S_CLOCK
Input
0
LVCMOS
Serial configuration clock input.
M[0:8]
Input
1
LVCMOS
Parallel configuration for PLL feedback divider (M).
M is sampled on the low-to-high transition of P_LOAD.
N[1:0]
Input
1
LVCMOS
Parallel configuration for Post-PLL divider (N).
N is sampled on the low-to-high transition of P_LOAD
OE
Input
1
LVCMOS
Output enable (active high)
The output enable is synchronous to the output clock to eliminate the possibility of runt
pulses on the FOUT output.
GND
Supply
Ground
Negative power supply (GND)
VCC
Supply
VCC
Positive power supply for I/O and core. All VCC pins must be connected to the positive
power supply for correct operation
VCC_PLL
Supply
VCC
PLL positive power supply (analog power supply)
Table 2. Output Frequency Range and PLL Post-Divider N
N
Output Division
Output Frequency Range
10
0
2
200 – 400 MHz
0
1
4
100 – 200 MHz
1
0
8
50 – 100 MHz
1
400 – 800 MHz
Table 3. Function Table
Input
0
1
XTAL_SEL
FREF_EXT
XTAL interface
OE
Outputs disabled, FOUT is stopped in the
logic low state (FOUT = L, FOUT = H)
Outputs enabled
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC92432 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:1360 MHz Dual Output LVPECL Clock Synthesizer |
| MPC92432AE | 功能描述:时钟合成器/抖动清除器 FSL 1360MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MPC92432AER2 | 功能描述:时钟合成器/抖动清除器 FSL 1360MHz Dual Out put LVPECL Clock Syn RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MPC92432FA | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:1360 MHz Dual Output LVPECL Clock Synthesizer |
| MPC92433 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:1428 MHz Dual Output LVPECL Clock Synthesizer |
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