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| 型号： | MPC9352AC |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9352 SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封装： | LEAD FREE, LQFP-32 |
| 文件页数： | 16/17页 |
| 文件大小： | 367K |
| 代理商： | MPC9352AC |
MPC9352
3.3V/2.5V 1:11 LVCMOSZERO DELAY CLOCK GENERATOR
CLOCK GENERATOR
IDT / ICS 3.3V/2.5V 1:11 LVCMOS ZERO DELAY CLOCK GENERATOR 8
MPC9352
REV 7 MAY 30, 2006
Freescle Timing Solutions Organization has been acquired by Integrated Device Technology, Inc.
Table 10. MPC9352 Example Configurations (F_RANGE = 1)
PLL Feedback
fref(1) [MHz]
1. fref is the input clock reference frequency (CCLK).
FSELA
FSELB
FSELC
QA[0:4]:fref ratio
QB[0:3]:fref ratio
QC[0:1]:fref ratio
VCO
÷ 8(2)
2. QAx connected to FB_IN and FSELA=0.
25-50
0
fref
(25-50 MHz)
fref
(25-50 MHz)
fref * 2 (50-100 MHz)
0
1
fref
(25-50 MHz)
fref
(25-50 MHz)
fref
(25-50 MHz)
1
0
fref * 2
÷3 (16-33 MHz) fref
(25-50 MHz)
fref * 2 (50-100 MHz)
1
0
1
fref * 2
÷3 (16-33 MHz) fref
(25-50 MHz)
fref
(25-50 MHz)
VCO
÷ 12(3)
3. QAx connected to FB_IN and FSELA=1.
16.67-33.3
1
0
fref
(16-33 MHz)
fref * 3
÷2 (25-50 MHz) fref * 3 (50-100 MHz)
1
0
1
fref
(16-33 MHz)
fref * 3
÷2 (25-50 MHz) fref * 3÷2 (25-50 MHz)
1
0
fref
(16-33 MHz)
fref * 3
(50-100 MHz) fref * 3 (50-100 MHz)
1
fref
(16-33 MHz)
fref * 3
(50-100 MHz) fref * 3
÷2 (25-50 MHz)
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| MPC93H51AC | 功能描述:时钟发生器及支持产品 FSL 1-9 LVCMOS/LVPEC L to LVCMOS PLL Cloc RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC93H51ACR2 | 功能描述:时钟发生器及支持产品 FSL 1-9 LVCMOS/LVPEC L to LVCMOS PLL Cloc RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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