参数资料
型号: MPC9447ACR2
厂商: IDT, Integrated Device Technology Inc
文件页数: 10/11页
文件大小: 0K
描述: IC CLOCK BUFFER MUX 2:9 32-LQFP
标准包装: 2,000
类型: 扇出缓冲器(分配),多路复用器
电路数: 1
比率 - 输入:输出: 2:9
差分 - 输入:输出: 无/无
输入: LVCMOS
输出: LVCMOS
频率 - 最大: 350MHz
电源电压: 2.375 V ~ 3.465 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-TQFP(7x7)
包装: 带卷 (TR)
MPC9447 REVISION 8 DECEMBER 21, 2012
8
2012 Integrated Device Technology, Inc.
MPC9447 Data Sheet
3.3V, 2.5V, 1:9 LVCMOS CLOCK FANOUT BUFFER
Figure 8. Propagation Delay (tPD) Test Reference
Figure 9. Output-to-Output Skew tSK(LH, HL)
Figure 10. Output Pulse Skew (tSK(P)) Test Reference
Figure 11. Output Duty Cycle (DC)
Figure 12. Output Transition Time Test Reference
Figure 13. Cycle-to-Cycle Jitter
Figure 14. Setup and Hold Time (tS, tH) Test Reference
VCC
VCC2
GND
VCC
VCC2
GND
CCLK
QX
tP(LH)
tP(HL)
The pin-to-pin skew is defined as the worst case difference in
propagation delay between any similar delay path within a single
device.
VCC
VCC2
GND
VCC
VCC2
GND
tSK(LH)
tSK(HL)
VCC
VCC2
GND
VCC
VCC2
GND
tP(LH)
CCLK
QX
tP(HL)
tSK(P) = | tPLH – tPHL |
The time from the output controlled edge to the non-controlled edge,
divided by the time between output controlled edges, expressed as
a percentage.
VCC
VCC2
GND
tP
T0
DC = (tP ? T0 x 100%)
tF
tR
VCC=3.3 V VCC=2.5 V
2.4
1.8 V
0.55
0.6 V
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs.
TN
TJIT(CC) = |TN-TN+1|
TN+1
VCC
VCC2
GND
VCC
VCC2
GND
tS
CCLK
PCLK
CLK_STOP
tH
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