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参数资料
| 型号： | MPC97H74FA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 97H SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封装： | LQFP-52 |
| 文件页数： | 5/12页 |
| 文件大小： | 240K |
| 代理商： | MPC97H74FA |
Advanced Clock Driver Devices
2
Freescale Semiconductor
MPC97H74
Figure 1. MPC97H74 Logic Diagram
Figure 2. MPC97H74 52-Lead Package Pinout (Top View)
÷ 4, ÷ 6, ÷ 8, ÷ 12
PLL
Ref
FB
QA0
QA1
QA2
QA3
QA4
Bank A
VCO
CCLK0
1
0
CCLK1
Bank B
1
0
Bank C
QFB
CCLK_SEL
FB_IN
VCO_SEL
FSEL_A
FSEL_B
FSEL_C
FSEL_FB[1:0]
2
PLL_EN
1
0
QB0
QB1
QB2
QB3
QB4
QC0
QC1
QC2
QC3
Stop
CLK
Stop
CLK
Stop
CLK
CLK_STOP
MR/OE
POWER-ON
RESET
VCC
All input resistors have a value of 25 k
÷ 2
÷ 4
÷ 2, ÷ 4
÷ 4, ÷ 6
÷ 2, ÷ 4
QB0
VCC
NC
GND
QC3
VCC
QC2
GND
QC1
VCC
QC0
GND
VCO_SEL
VCC
QA0
GND
QA1
VCC
QA2
FSEL_FB1
GND
QA3
VCC
QA4
GND
FSEL_FB0
GND
QB1
V
CC
QB2
GND
QB3
V
CC
QB4
FB_
IN
GND
QFB
V
CC
NC
GN
D
MR
/OE
CLK_ST
OP
FSEL_
B
FSEL_
C
PLL_E
N
FSEL_
A
C
LK_SEL
CCLK0
CCLK1
NC
V
CC
V
CC_PLL
40
41
42
43
44
45
46
47
48
49
50
51
52
25
24
23
22
21
20
19
18
17
16
15
14
1234
56789 10 11 12 13
39 38 37 36 35 34 33 32 31 30 29 28 27
26
MPC97H74
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